UPD78F0138 NEC, UPD78F0138 Datasheet - Page 279

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

(3) Baud rate generator control register 0 (BRGC0)
Address: FF71H After reset: 1FH R/W
BRGC0
Note To select the TM50 output as the base clock, start an operation by setting 8-bit timer/event counter 50 so
Cautions 1. When the Ring-OSC clock is selected as the clock to be supplied to the CPU, the clock of the
Symbol
This register selects the base clock of serial interface UART0 and the division value of the 5-bit counter.
BRGC0 can be set by an 8-bit memory manipulation instruction.
RESET input sets this register to 1FH.
that the duty is 50% of the output in the PWM mode (bit 6 (TMC506) of the TMC50 register = 1), and then
clear TPS01 and TPS00 to 0. It is not necessary to enable the TO50 pin as a timer output pin (bit 0
(TOE50) of the TMC register may be 0 or 1).
2. Make sure that bit 6 (TXE0) and bit 5 (RXE0) of the ASIM0 register = 0 when rewriting the
3. The baud rate value is the output clock of the 5-bit counter divided by 2.
MDL04
TPS01
TPS01
Ring-OSC oscillator is divided and supplied as the count clock. If the base clock is the Ring-
OSC clock, the operation of serial interface UART0 is not guaranteed.
MDL04 to MDL00 bits.
7
0
0
1
1
0
0
0
0
1
1
1
1
1
•
•
•
•
•
Figure 13-4. Format of Baud Rate Generator Control Register 0 (BRGC0)
MDL03
TPS00
TPS00
6
0
1
0
1
0
1
1
1
•
•
•
•
•
1
1
1
1
1
CHAPTER 13 SERIAL INTERFACE UART0
TM50 output
f
f
f
X
X
X
/2 (5 MHz)
/2
/2
MDL02
3
5
(1.25 MHz)
(312.5 kHz)
5
0
×
0
0
0
•
•
•
•
•
0
0
1
1
1
User’s Manual U16228EJ2V0UD
Note
MDL04
MDL01
4
×
0
0
1
•
•
•
•
•
1
1
0
1
1
Base clock (f
MDL03
MDL00
3
×
0
1
0
•
•
•
•
•
0
1
0
0
1
XCLK0
10
26
27
28
30
31
k
×
8
9
•
•
•
•
•
MDL02
) selection
2
Setting prohibited
f
f
f
f
f
f
f
f
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
Selection of 5-bit counter
/8
/9
/10
/26
/27
/28
/30
/31
MDL01
output clock
1
•
•
•
•
•
MDL00
0
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