L64118 LSI Logic Corporation, L64118 Datasheet - Page 44

• Manufacturer Part Number: L64118
• Description: Controllers, Transport Controller with Embedded MIPS CPU (TR4101)
• Manufacturer: LSI Logic Corporation

44
SC0_C4
SC0_C8
SC0_CLK
SC0_DETECT
SC0_I/O
SC0_RSTn
L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101)
SmartCard 0 Pin 4
This signal is connected to the C4 pin on the SmartCard.
This signal should be pulled up by an external pull-up
resistor after reset.
SmartCard 0 Pin 8
This signal is connected to the C8 pin on the SmartCard.
This signal should be pulled up by an external pull-up
resistor after reset.
SmartCard 0 Clock
This signal is the output clock for SmartCard 0.
GPIO33
SC0_CLK can serve as a general-purpose I/O signal
(GPIO33) by setting bit 4 in the General-Purpose Mode
register.
By default, this signal is not asserted after reset.
SmartCard 0 Detect
When HIGH, this signal indicates that a card is inserted
in slot 0.
GPIO31
SC0_DETECT can serve as a general-purpose I/O signal
(GPIO31) by setting bit 4 in the General-Purpose Mode
register.
By default, this signal floats after reset.
SmartCard 0 I/O
This signal transfers data (using the coupler) between
SmartCard 0 and the SmartCard port of the L64118. It is
open-drain. This signal must be pulled up by an external
resistor after reset.
SmartCard 0 Reset
This signal resets SmartCard 0.
GPIO30
SC0_RSTn can serve as a general-purpose I/O signal
(GPIO30) by setting bit 4 in the General-Purpose Mode
register.
By default, this signal is not asserted after reset.
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Output
Output
Input