L64118 LSI Logic Corporation, L64118 Datasheet - Page 37

no-image

L64118

Manufacturer Part Number
L64118
Description
Controllers, Transport Controller with Embedded MIPS CPU (TR4101)
Manufacturer
LSI Logic Corporation
Datasheet
IEEE 1149.1 (JTAG) Port
Figure 5
This group of signals drive the IEEE1149.1 Test Access Port (TAP).
TCK
TDI
TDO
TMS
TRSTn
L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101) 37
FSC_CNTL
DCO_DIV
REF_DIV
L64118
16
18
14
16
16.9 k
IREF Connection to RC Devices
AVSS
Test Clock
This is the clock pin to sample the JTAG input data.
Test Data In
This line is for the JTAG input test data.
Test Data Out
This line is for the JTAG output test data.
Test Mode Select
This line lets you select between active and JTAG mode.
When in JTAG mode, the I/Os are serialized. Active mode
is for normal operation.
Test Port Reset
When asserted LOW, this signal resets the internal JTAG
controller. It does not reset the chip.
1%
18-bit DAC
Digital
AVDD
FSC
IREF
IREF
0.1 F
27 MHz
ACLK
Controlled
Oscillator
DAC
Output
Input
Input
Input
Input

Related parts for L64118