L64118 LSI Logic Corporation, L64118 Datasheet - Page 16

• Manufacturer Part Number: L64118
• Description: Controllers, Transport Controller with Embedded MIPS CPU (TR4101)
• Manufacturer: LSI Logic Corporation

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The address space of the L64118 is partitioned into the following areas:
L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101)
CPU/Peripheral
This address space contains the control and status registers for the
CPU and core building blocks.
Configuration Register Space
The space contains registers that define the configuration of each
peripheral on the PBus. It is partitioned into 1 Kbyte segments,
where each segment corresponds to the Configuration register entry
for each PBus component. See Table 3.
Attribute Register Space
The Attribute register space contains the Attribute register 0 for each
peripheral on the PBus. This space is partitioned into 1 Kbyte
segments, where each segment corresponds to the Attribute register
entry for each PBus component. See Table 3.
Internal I/O
The internal I/O space contains I/O registers and functions for each
peripheral on the PBus. It is partitioned into 256 4 Kbyte segments,
where each segment corresponds to an I/O entry for a PBus
component. See Table 3.
External ROM
External ROM contains the operating system, user’s application
programs ( kseg0 ), configuration code, and initialized data ( kseg1 ).
External space for the EBus
The external space is used for user-defined external memory and
external devices residing on the EBus. It is divided into three
subspaces, each one supporting devices with a different width (8, 16,
32 bits).
Primary SDRAM
The lowest 2/8/16 Mbytes of addressable space are mapped to the
external SDRAM through the internal SDRAM controller. See
Table 2, “PBus to EBus Address Mapping,”