LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 79
LPC47M172
Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M172.pdf
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6.28.7 Line Control Register (LCR)
Bits 0 and 1
Bit 2
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
MODE
ONLY
FIFO
Address Offset = 3H, DLAB = 0, READ/WRITE
This register contains the format information of the serial line. The bit definitions are:
These two bits specify the number of bits in each transmitted or received serial character. The encoding of
bits 0 and 1 is as follows:
The Start, Stop and Parity bits are not included in the word length.
This bit specifies the number of stop bits in each transmitted or received serial character. The following
table summarizes the information.
1
0
0
IDENTIFICATION
1
0
0
INTERRUPT
REGISTER
0
1
0
0
0
0
BIT 1
0
0
1
1
Second
Fourth
Third
Start LSB Data 5-8 bits MSB Parity
DATASHEET
BIT 0
0
1
0
1
Serial Data
INTERRUPT SET AND RESET FUNCTIONS
Page 79
Transmitter
Character
Indication
MODEM
Register
Timeout
Holding
Empty
Status
WORD LENGTH
5 Bits
6 Bits
7 Bits
8 Bits
Removed From or
there is at least 1
Holding Register
or Ring Indicator
Clear to Send or
during the last 4
Data Set Ready
Stop
char in it during
Char times and
or Data Carrier
No Characters
RCVR FIFO
Advanced I/O Controller with Motherboard GLUE Logic
Input to the
Transmitter
Have Been
this time
Empty
Detect
Holding Register
Reading the IIR
MODEM Status
Receiver Buffer
Reading the
Reading the
Interrupt) or
Transmitter
Register (if
Writing the
Source of
Register
Register
SMSC LPC47M172
Datasheet
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