LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 121

no-image

LPC47M172

Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
SMSC LPC47M172
Bit 1 of Port 92, the ALT_A20 signal, is used to force nA20M to the CPU low for support of real mode
compatible software. This signal is OR’ed with the A20GATE signal from the keyboard controller and
nKBDRST to control the nA20M input of the CPU. Writing a 0 to bit 1 of the Port 92 Register forces
ALT_A20 low. ALT_A20 low drives nA20M to the CPU low, if A20GATE from the keyboard controller is
also low. Writing a 1 to bit 1 of the Port 92 Register forces ALT_A20 high. ALT_A20 high drives nA20M to
the CPU high, regardless of the state of A20GATE from the keyboard controller. Upon reset, this signal is
driven low.
Latches On Keyboard and Mouse IRQs
The implementation of the latches on the keyboard and mouse interrupts is shown following.
Note: When Port 92 is
disabled, writes are
ignored and reads return
undefined values.
P92
8042
Bit 0
P20
Pulse
configuration register
Gen
KRST_GA20
8042
Table 7.15 - nA20M Truth Table
14us
~ ~
P21
Figure 7.1 - NKBDRST Circuit
0
0
1
1
Bit 2
DATASHEET
ALT_A20
Page 121
~ ~
6us
14us
0
1
0
1
KRST
nALT_RST
SYSTEM
6us
nA20M
0
1
1
1
Advanced I/O Controller with Motherboard GLUE Logic
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
nKBDRST
Datasheet

Related parts for LPC47M172