LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 209
LPC47M172
Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M172.pdf
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Note 1:
SMSC LPC47M172
nADDRSTB
NAME
nDATASTB
nWAIT must be filtered to compensate for ringing on the parallel bus cable. nWAIT is considered to have
settled after it does not transition for a minimum of 50 nsec.
t1
t2
t3
t4
t5
t6
t7
t8
t9
PD<7:0>
nWRITE
nWAIT
nWAIT Asserted to nWRITE Asserted (Note 1)
nWAIT Asserted to nWRITE Change (Note 1)
nWAIT Asserted to PDATA Invalid (Note 1)
PDATA Valid to Command Asserted
nWRITE to Command Asserted
nWAIT Asserted to Command Asserted (Note 1)
nWAIT Deasserted to Command Deasserted
(Note 1)
Command Asserted to nWAIT Deasserted
Command Deasserted to nWAIT Asserted
Figure 13.13 - EPP 1.9 Data or Address Write Cycle
DESCRIPTION
t1
t6
DATASHEET
t5
t4
Page 209
t8
Advanced I/O Controller with Motherboard GLUE Logic
MIN
60
60
10
60
60
0
5
0
0
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
t7
TYP
t9
MAX
210
185
185
190
35
10
t2
t3
UNITS
ns
ns
ns
ns
ns
ns
ns
us
ns
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