LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 136

• Manufacturer Part Number: LPC47M172
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note:
7.31.4 Reference Timings
7.32
7.33
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
The maximum voltage drop across the diode is 350mV.
See Figure 13.25 to Figure 13.28 in the “Timing Diagrams” section.
IDE Reset Output Pin
nIDE_RST is an open drain buffered copy of nPCI_RESET. This signal requires an external 1kohm pull-up
to VCC5V.
This signal will be low when VCC5V=0 since it is externally pulled up to VCC5V.
See Table 13.1 for nIDE_RSTDRV timing.
PCI Reset Output Pins
The nPCIRST_OUT is 3.3V buffered copy of nPCI_RESET. The nPCIRST_OUT2 is 3.3V buffered copy of
nPCI_RESET.
The nPCIRST_OUT and nPCIRST_OUT2 signals will be low when VCC=0.
nIDE_RSTDRV
NAME
nPCI_RESET (Input)
Table 7.28 - nIDE_RSTDRV Truth Table
OD8
BUFFER
0
1
Table 7.27 - nIDE_RSTDRV Pin
DATASHEET
Figure 7.9 - REF5V_STBY
VCC
POWER
Page 136
WELL
SMSC I/O
Protection
Backdrive
nIDE_RSTDRV (Output)
IDE Reset Output
DESCRIPTION
Hi-Z
0
V_5P0_STBY
1k
SMSC LPC47M172