LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 215
LPC47M172
Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M172.pdf
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Note 1:
Note 2:
SMSC LPC47M172
NAME
t1
t2
t3
t4
t5
t6
PD<7:0>
Maximum value only applies if there is room in the FIFO and terminal count has not been received. ECP
can stall by keeping nALF low.
nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
nACK
nALF
PDATA Valid to nACK Asserted
nALF Deasserted to PDATA Changed
nACK Asserted to nALF Deasserted
(Notes 1,2)
nACK Deasserted to nALF Asserted (Note 2)
nALF Asserted to nACK Asserted
nALF Deasserted to nACK Deasserted
Figure 13.19 - ECP Parallel Port Reverse Timing
DESCRIPTION
t4
DATASHEET
t1
t5
Page 215
t3
t6
Advanced I/O Controller with Motherboard GLUE Logic
MIN
80
80
t4
0
0
0
0
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
TYP
t2
MAX
200
200
UNITS
ns
ns
ns
ns
ns
ns
Datasheet
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