LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 143
LPC47M172
Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M172.pdf
(227 pages)
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7.38
Note:
SMSC LPC47M172
Internal nFPRST
(after debounce)
debounce)
nFPRST
(before
SCK_BJT_GATE Output
The SCK_BJT_GATE requires external pull-up to V_5P0_STBY.
The SCK_BJT_GATE pin is an open drain output that provides the gate signal for SCK_BJT in the S3
power state. This circuit is used for glitch protection on the SCK line when moving in to and out of the S3
power state. This signal is only required for designs utilizing Rambus memory. This output functions
according to the table below. See the figure below for the circuit implementation.
SCK_BJT_GATE
Press
NAME
PWRGD_3V (INPUT)
Table 7.42 - SCK_BJT_GATE Truth Table
1
0
OD8
BUFFER
15.8msec
Table 7.41 - SCK_BJT_GATE Pin
Figure 7.14 - NFPRST Timing
min
DATASHEET
POWER
WELL
Page 143
VTR
SCK_BJT_GATE (OUTPUT)
0
Open-Drain Gate Output for the
SCK_BJT_GATE in S3
Release
Hi-Z
DESCRIPTION
Advanced I/O Controller with Motherboard GLUE Logic
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
15.8msec
will be detected
min
nFPRST press
starting here
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