CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 48
CMX980AL7
Manufacturer Part Number
CMX980AL7
Description
TETRA Baseband Processor
Manufacturer
CML Microcircuits
Datasheet
1.CMX980AL7.pdf
(108 pages)
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CMX980AL7
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TETRA Baseband Processor
Title:
Address:
Function:
Description:
Bit
7
6
5
4
3
2
1
0
1999 Consumer Microcircuits Limited
n_TxDataPathQOF_Mask
n_TxDataPathIOF_Mask
n_DecimationOF_Mask
n_SymbolClkEn_Mask
n_Tx63tapOF_Mask
n_Tx79tapOF_Mask
TxErrStatMask
Transmit Error Status interrupt Mask register
$0x0F
RW
Masks interrupts in the TxErrorStatus Register. On taking N_RESET Low, these bits are set
active, so masking out all possible interrupt sources. Each bit which is taken inactive will allow
its associated status bit, when active, to generate an interrupt.
Name
0
0
Address field [6:0]
0
Address and Data format for TxErrStatMask access
1
Data
Low
Low
Low
Low
Low
Low
Data
1
Active State
1
RW
RW
RW
RW
RW
RW
RW
1
48
Reserved for manufacturer’s test purposes. This
bit should be set Low.
GPO Q channel error interrupt mask bit.
GPO I channel error interrupt mask bit.
Decimation filter error interrupt mask bit.
Symbol clock reference signal mask bit.
63-tap I and Q filter error interrupt mask bit.
79-tap I and Q filter error interrupt mask bit.
Reserved for manufacturer’s test purposes. This
bit should be set Low.
R
D6 D5 D4 D3 D2
Data field [6:1]
Function
D1
R
CMX980A
D/980A/3
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