CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 15

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CMX980AL7

Manufacturer Part Number
CMX980AL7
Description
TETRA Baseband Processor
Manufacturer
CML Microcircuits
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
CMX980AL7
Manufacturer:
CML
Quantity:
20 000
TETRA Baseband Processor
1.5.7
1999 Consumer Microcircuits Limited
SClk
CmdDat
CmdFS
CmdRdDat
CmdRdFS
RxDat
RxFS
Note: All Frame Sync strobe signals are actually coincident with the last bit of a dataframe.
Serial Interface
All digital data I/O and control functions for the CMX980A are via the serial interface. It is expected
that the CMX980A will be used in conjunction with a DSP and/or other processor. The device has
three serial interface ports, each port is based on the industrial standard three-wire serial interface.
This interface allows communication with standard DSP ICs using a minimum of external components.
The three serial interface ports are:
Cmd
CmdRd
RxData
Functions performed by the serial interface include:
The three interfaces consist of the following signal pins:
Power up or down and optional bypassing of selected blocks
Setting digital filter coefficients
Loading ramp up and ramp down increments for Tx data operations
Loading and transmitting data
Loading offset correction, gain multiplier and phase adjustment registers
Enabling/disabling of output via the Rx serial interface
Vary sampling time for Rx data relative to the sample (MCLK/64) clock.
Loading data into auxiliary DACs
Initiating conversions using auxiliary ADCs and reading results
Writing data to, and reading data from, the Waveform Generation SRAM
Power Ramping step control
See Figures 4 and 5 for further details.
Command port, generally this is an input port receiving commands and data from the host,
but may also be configured as a bi-directional I/O interface.
Command read port, an output port to send command read data back to the host. Read
data is only sent on this port in response to a read command.
Receive data port, an output port to send receive data back to the host. Data is only
present on this interface when the Rx Data path is active. This port may also be
configured as the CmdRd port.
Output
In/Out
Input
Output
Output
Output
Output
Serial Clock pin. This pin is common for all three interfaces.
Command port Data pin. This pin is by default an input, but may be
configured as an open drain bi-directional pin.
Command port Frame Sync pin. This pin is used to mark the first bit in a
serial frame.
Command read port Data pin. This pin only has active data on it in
response to a read command.
Command read port Frame Sync pin. This pin is used to mark the first bit in
a serial frame.
Receive data port Data pin. This pin is only active when the Rx Data path is
active.
Receive data port Frame Sync pin. This pin is used to mark the first bit in
a serial frame.
15
CMX980A
D/980A/3

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