TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 688
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TMPM363F10FG
Manufacturer Part Number
TMPM363F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM363F10FG.pdf
(788 pages)
Specifications of TMPM363F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
4
Uart/sio (ch)
5
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
8
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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23.4
Operational Description
3. Disabling the clock
The time must be set within one second after the interrupt.
Writing "0" to RTCPAGER<ENATMR> disables clock operation including a carry.
Stop the clock after the 1Hz-interrupt. The second counter keeps counting.
Set the clock again and enable the clock within one second before next 1Hz-interrupt
Figure 23-3 Flowchart of the clock data writing
Figure 23-4 Flowchart of the disabling clock
RTCRESTR<RSTTMR> = "1" then
RTCRESTR<DIS1HZ> = "0" then
RTCPAGER<PAGE> = "0" then
enable 1Hz interrupt
Writing the clock data
select PAGE0
Enabling the clock
reset counter
Timer setting
First interrupt
Disabling clock
(After 1s)
Page 662
Strat
End
Start
End
YES
NO
TMPM363F10FG
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