TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 27
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMPM363F10FG
Manufacturer Part Number
TMPM363F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM363F10FG.pdf
(788 pages)
Specifications of TMPM363F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
4
Uart/sio (ch)
5
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
8
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 27 of 788
- Download datasheet (9Mb)
1.1
The TMPM363F10FG is a 32-bit RISC microprocessor series with an ARM Cortex-M3 microprocessor core.
Features of the TMPM363F10FG are as follows :
Features
1. ARM Cortex-M3 microprocessor core
2. On Chip program memory and data memory
3. Static memory controller (SMC)
4. DMA controller (DMAC) : 2channels
a. Improved code efficiency has been realized through the use of Thumb-2 instruction.
b. Both high performance and low power consumption have been achieved.
c. High-speed interrupt response suitable for real-time control
・ On-chip RAM : 64Kbyte
・ On-chip Flash ROM : 1024Kbyte
・ Possible to expand within16MB(Both program and data)
・ External data bus (Multiplex bus) : 16-bit data bus width
・ Chip select / Wait controller : 4 channels
Transfer target : Internal memory, Internal I/O and External memory
・ New 16-bit Thumb instructions for improved program flow
・ New 32-bit Thumb instructions for improved performance
・ New Thumb mixed 16- / 32-bit instruction set can produce faster, more efficient code.
[High performance]
・ Both high performance and low power consumption have been achieved.
・ Division takes between 2 and 12 cycles depending on dividend and devisor
[Low Power consumption]
・ Optimized design using a low power consumption library
・ Standby function that stops the operation of the micro controller core
・ An interruptible long instruction
・ Stack push automatically handled by hardware
RAM size includes BACKUP RAM AREA (8KB).
TMPM363F10FG
Product name
TMPM363F10FG
1024 Kbyte
(FLASH)
ROM
Page 1
64 Kbyte
RAM
LQFP100-P-1414-0.50H
Package
TMPM363F10FG
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