TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 650
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMPM363F10FG
Manufacturer Part Number
TMPM363F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM363F10FG.pdf
(788 pages)
Specifications of TMPM363F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
4
Uart/sio (ch)
5
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
8
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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22.3
Registers
(Example : If fc = 40MHz)
1100 (128 conversion clock)
1101 (512 conversion clock)
1001 (16 conversion clock)
1010 (24 conversion clock)
1011 (32 conversion clock)
0011 (64 conversion clock)
1000 (8 conversion clock)
Note 1: Do not change the setting of the AD conversion clock during AD conversion.
Note 2: Please use at ADCLK≤40MHz. When fosc is 8MHz and PLL is 8 times, fc is 64MHz, in this case, speci-
<TSH[3:0]>
fy except ADCLK<ADCLK>="000".
Sample hold time
12.8 μs
0.2 μs
0.4 μs
0.6 μs
0.8 μs
1.6 μs
3.2 μs
13.75μs
000 (fc)
1.15μs
1.35μs
1.55μs
1.75μs
2.55μs
4.15μs
Page 624
001 (fc/2)
Conversion time(<ADCLK[2:0]> setting)
27.5μs
2.3μs
2.7μs
3.1μs
3.5μs
5.1μs
8.3μs
010 (fc/4)
10.2μs
16.6μs
55.0μs
4.6μs
5.4μs
6.2μs
7.0μs
011 (fc/8)
110.0μs
10.8μs
12.4μs
14.0μs
20.4μs
33.2μs
9.2μs
TMPM363F10FG
100 (fc/16)
220.0μs
18.4μs
21.6μs
24.8μs
28.0μs
40.8μs
66.4μs
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