SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 86

• Manufacturer Part Number: SAM9G20
• Manufacturer: Atmel Corporation

Specifications of SAM9G20

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 7
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 95
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

13.11 Hardware and Software Constraints
86
AT91SAM9G20
Note:
The SPI and NAND Flash drivers use several PIOs in alternate functions to communicate with
devices. Care must be taken when these PIOs are used by the application. The devices con-
nected could be unintentionally driven at boot time, and electrical conflicts between SPI output
pins and the connected devices may appear.
To assure correct functionality, it is recommended to plug in critical devices to other pins.
Table 13-8
are driven during the boot sequence for a period of less than 1 second if no correct boot program
is found.
Before performing the jump to the application in internal SRAM, all the PIOs and peripherals
used in the boot program are set to their reset state.
Table 13-8.
Peripheral
SPI0
SPI0
SPI0
SPI0
SPI0
PIOC
Address Bus
Address Bus
MCI0
MCI0
MCI0
MCI0
MCI0
MCI0
TWI
TWI
DBGU
DBGU
• The DataFlash, Serial Flash, NAND Flash, SDCard
• The code is always downloaded from the device address 0x0000_0000 to the address
• The downloaded code must be position-independent or linked at address 0x0000_0000.
• The DataFlash must be connected to NPCS0 of the SPI.
must be inferior to 16K bytes.
0x0000_0000 of the internal SRAM (after remap).
1. Boot ROM does not support high capacity SDCards.
contains a list of pins that are driven during the boot program execution. These pins
Pins Driven during Boot Program Execution
Pin
MOSI
MISO
SPCK
NPCS0
NPCS1
NANDCS
NAND CLE
NAND ALE
MCDA0
MCCDA
MCCK
MCDA1
MCDA2
MCDA3
TWCK
TWD
DRXD
DTXD
(1)
, and EEPROM downloaded code size
PIO Line
PIOC11
PIOC14
PIOA10
PIOA11
PIOA24
PIOA23
PIOB14
PIOB15
6384E–ATARM–05-Feb-10
PIOA1
PIOA0
PIOA2
PIOA3
PIOA6
PIOA7
PIOA8
PIOA9
A22
A21