SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 820
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SAM9G20
Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G20.pdf
(42 pages)
5.SAM9G20.pdf
(832 pages)
Specifications of SAM9G20
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G20 PDF datasheet #4
- SAM9G20 PDF datasheet #5
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- Download datasheet (13Mb)
820
Doc. Rev
6384D
Doc. Rev
6384C
AT91SAM9G20
Comments
Section 41.6
Characteritics table replaced by
Characteristics 10-bit
Section 44.2 “AT91SAM9G20 Errata - Revision “A”
Internal RC Usage with SAM-BA Boot through
Comments
Overview:
“Features”,
added 247-ball TFBGA package information.
Section 10.4.6 “Multimedia Card
Card spec v1.1.
Table
ADC:
Table 40-2, “Register Mapping”
TWI:
Section 31.7.4 “Master Transmitter
Electrical Characteristics:
Section “Shown below is an example of the implementation on the AT91SAM9G20-EK
exception information for MLR B.
Table 41-6, “XIN Clock Electrical
Section 41.1 “Absolute Maximum
Mechanical Characteristics:
Section 42.2 “247-ball TFBGA Package
3-1, Signal Description and
Section 4.3 “247-ball TFBGA Package
“ADC”, former Channel Conversion TIme and ADC Clock table and former Transfer
Mode”.
offset for Channel Data Register 3 is 0x3c.
Table 41-18, “ADC Characteristics 9-bit Mode”
Interface”, compatibility with MultiMedia Card spec v3.11, SD Memory
Characteristics”added V
Ratings”, added junction temperature
Table 10-4, “Multiplexing on PIO Controller C”
Mode”, updated with auto-stop functionality.
Drawing”, added to datasheet.
USB”.
Outline”,
Parts”, added
IN
,
Section 4.4 “247-ball TFBGA Package Pinout”
Section 44.2.2.1 “Boot ROM: ROM Code,
and
EF100 removed.
Table 41-19, “ADC
Rev.C.”, added
6384E–ATARM–05-Feb-10
Change
Request
Ref.
6262
6238
Change
Request
Ref.
6079
6080
6148
6044
6050
6079
6163
rfo
6079
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