SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 307

no-image

SAM9G20

Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G20

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
26.9.11
Register Name:PMC_MCKR
Access Type:Read-write
• CSS: Master/Processor Clock Source Selection
• PRES: Master/Processor Clock Prescaler
• MDIV: Master Clock Division
6384E–ATARM–05-Feb-10
31
23
15
7
0
0
1
1
PMC Master Clock Register
0
0
0
0
1
1
1
1
MDIV
0
0
1
1
30
22
14
6
0
1
0
1
29
21
13
5
CSS
PRES
0
0
1
1
0
0
1
1
Master Clock Division
Master Clock is Prescaler Output Clock divided by 1.
Master Clock is Prescaler Output Clock divided by 2.
Master Clock is Prescaler Output Clock divided by 4.
Master Clock is Prescaler Output Clock divided by 6.
PDIV
28
20
12
4
0
1
0
1
PRES
27
19
11
3
0
1
0
1
0
1
0
1
Clock Source Selection
Slow Clock is selected
Main Clock is selected
PLLA Clock is selected
PLLB Clock is selected
26
18
10
2
Master/Processor Clock Dividers
Input Clock
Selected clock
Selected clock divided by 2
Selected clock divided by 4
Selected clock divided by 8
Selected clock divided by 16
Selected clock divided by 32
Selected clock divided by 64
Reserved
AT91SAM9G20
25
17
9
1
MDIV
CSS
24
16
8
0
307

Related parts for SAM9G20