ATtiny85 Atmel Corporation, ATtiny85 Datasheet - Page 98

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ATtiny85

Manufacturer Part Number
ATtiny85
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny85

Flash (kbytes)
8 Kbytes
Pin Count
8
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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13. 8-bit Timer/Counter1 in ATtiny15 Mode
13.1
13.2
98
Timer/Counter1 Prescaler
Counter and Compare Units
ATtiny25/45/85
The ATtiny15 compatibility mode is selected by writing the code “0011” to the CKSEL fuses (if
any other code is written, the Timer/Counter1 is working in normal mode). When selected the
ATtiny15 compatibility mode provides an ATtiny15 backward compatible prescaler and
Timer/Counter. Furthermore, the clocking system has same clock frequencies as in ATtiny15.
Figure 13-1
caler for the system clock (CK) and a 3-bit prescaler for the fast peripheral clock (PCK). The
clocking system of the Timer/Counter1 is always synchronous in the ATtiny15 compatibility
mode, because the same RC Oscillator is used as a PLL clock source (generates the input clock
for the prescaler) and the AVR core.
Figure 13-1. Timer/Counter1 Prescaler
The same clock selections as in ATtiny15 can be chosen for Timer/Counter1 from the output
multiplexer, because the frequency of the fast peripheral clock is 25.6 MHz and the prescaler is
similar in the ATtiny15 compatibility mode. The clock selections are PCK, PCK/2, PCK/4, PCK/8,
CK, CK/2, CK/4, CK/8, CK/16, CK/32, CK/64, CK/128, CK/256, CK/512, CK/1024 and stop.
Figure 13-2
delays in between registers. Note that all clock gating details are not shown in the figure. The
Timer/Counter1 register values go through the internal synchronization registers, which cause
the input synchronization delay, before affecting the counter operation. The registers TCCR1,
GTCCR, OCR1A and OCR1C can be read back right after writing the register. The read back
values are delayed for the Timer/Counter1 (TCNT1) register and flags (OCF1A and TOV1),
because of the input and output synchronization.
The Timer/Counter1 features a high resolution and a high accuracy usage with the lower pres-
caling opportunities. It can also support an accurate, high speed, 8-bit Pulse Width Modulator
(PWM) using clock speeds up to 25.6 MHz. In this mode, Timer/Counter1 and the Output Com-
pare Registers serve as a stand-alone PWM. Refer to
PSR1
CK (1.6 MHz)
PCK (25.6 MHz)
CS10
CS11
CS12
CS13
shows Timer/Counter 1 synchronization register block diagram and synchronization
shows an ATtiny15 compatible prescaler. It has two prescaler units, a 10-bit pres-
CLEAR
3-BIT T/C PRESCALER
0
TIMER/COUNTER1 COUNT ENABLE
“Timer/Counter1 in PWM Mode” on page
CLEAR
10-BIT T/C PRESCALER
2586N–AVR–04/11

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