ATtiny85 Atmel Corporation, ATtiny85 Datasheet - Page 127

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ATtiny85

Manufacturer Part Number
ATtiny85
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny85

Flash (kbytes)
8 Kbytes
Pin Count
8
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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17.3
2586N–AVR–04/11
Operation
Figure 17-1. Analog to Digital Converter Block Schematic
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
V
The voltage reference for the ADC may be selected by writing to the REFS[2:0] bits in ADMUX.
The VCC supply, the AREF pin or an internal 1.1V / 2.56V voltage reference may be selected as
the ADC voltage reference. Optionally the internal 2.56V voltage reference may be decoupled
by an external capacitor at the AREF pin to improve noise immunity.
The analog input channel and differential gain are selected by writing to the MUX[3:0] bits in
ADMUX. Any of the four ADC input pins ADC[3:0] can be selected as single ended inputs to the
ADC. ADC2 or ADC0 can be selected as positive input and ADC0, ADC1, ADC2 or ADC3 can
be selected as negative input to the differential gain amplifier.
If differential channels are selected, the differential gain stage amplifies the voltage difference
between the selected input pair by the selected gain factor, 1x or 20x, according to the setting of
the MUX[3:0] bits in ADMUX. This amplified value then becomes the analog input to the ADC. If
single ended channels are used, the gain amplifier is bypassed altogether.
CC
ADC3
ADC2
ADC1
ADC0
AREF
V
CC
, the voltage on the AREF pin or an internal 1.1V / 2.56V voltage reference.
INTERNAL 1.1V/2.56V
TEMPERATURE
8-BIT DATA BUS
ADC CTRL. & STATUS B
REGISTER (ADCSRB)
SENSOR
REFERENCE
ADC4
INPUT
INPUT
MUX
NEG.
MUX
ADC MULTIPLEXER
SELECT (ADMUX)
MUX DECODER
+
-
GAIN
AMPLIFIER
SINGLE ENDED / DIFFERENTIAL SELECTION
10-BIT DAC
ADC CTRL. & STATUS A
REGISTER (ADCSRA)
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
ATtiny25/45/85
ADTS[2:0]
INTERRUPT
TRIGGER
FLAGS
SELECT
SAMPLE & HOLD
COMPARATOR
15
+
-
ADC DATA REGISTER
(ADCH/ADCL)
ADC MULTIPLEXER
OUTPUT
0
127

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