ATtiny85 Atmel Corporation, ATtiny85 Datasheet - Page 66
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ATtiny85
Manufacturer Part Number
ATtiny85
Description
Manufacturer
Atmel Corporation
Datasheets
1.ATTINY25.pdf
(34 pages)
2.ATTINY25.pdf
(34 pages)
3.ATTINY25.pdf
(30 pages)
4.ATTINY85.pdf
(234 pages)
Specifications of ATtiny85
Flash (kbytes)
8 Kbytes
Pin Count
8
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATtiny85-15SZ
Manufacturer:
ATMEL
Quantity:
30
Company:
Part Number:
ATtiny85-20PU
Manufacturer:
CUI
Quantity:
1 000
Part Number:
ATtiny85-20SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATtiny85V-10SH
Manufacturer:
Intel
Quantity:
62
Part Number:
ATtiny85V-10SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
10.4
10.4.1
10.4.2
10.4.3
10.4.4
66
Register Description
ATtiny25/45/85
MCUCR – MCU Control Register
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
PINB – Port B Input Pins Address
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 56
Bit
0x35
Read/Write
Initial Value
Bit
0x18
Read/Write
Initial Value
Bit
0x17
Read/Write
Initial Value
Bit
0x16
Read/Write
Initial Value
BODS
R
7
0
R
R
R
7
–
0
7
–
0
7
–
0
PUD
R/W
R
R
R
6
0
6
–
0
6
–
0
6
–
0
for more details about this feature.
PORTB5
PINB5
DDB5
R/W
R/W
R/W
N/A
R/W
5
0
5
0
SE
5
5
0
PORTB4
DDB4
PINB4
R/W
R/W
R/W
N/A
4
0
4
0
4
SM1
R/W
4
0
PORTB3
PINB3
DDB3
R/W
R/W
R/W
N/A
3
0
3
0
3
SM0
R/W
3
0
PORTB2
PINB2
DDB2
R/W
R/W
BODSE
R/W
N/A
2
0
2
0
2
R
2
0
PORTB1
DDB1
PINB1
R/W
R/W
R/W
ISC01
N/A
R/W
1
0
1
0
1
1
0
PORTB0
PINB0
DDB0
ISC00
R/W
R/W
R/W
R/W
N/A
0
0
0
0
0
0
0
2586N–AVR–04/11
MCUCR
PORTB
DDRB
PINB
“Con-