ATtiny85 Atmel Corporation, ATtiny85 Datasheet - Page 110

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ATtiny85

Manufacturer Part Number
ATtiny85
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny85

Flash (kbytes)
8 Kbytes
Pin Count
8
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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14.1.2
14.1.3
110
ATtiny25/45/85
DT1A – Timer/Counter1 Dead Time A
DT1B – Timer/Counter1 Dead Time B
The dead time value register A is an 8-bit read/write register.
The dead time delay of is adjusted by the dead time value register, DT1A. The register consists
of two fields, DT1AH[3:0] and DT1AL[3:0], one for each complementary output. Therefore a dif-
ferent dead time delay can be adjusted for the rising edge of OC1A and the rising edge of OC1A.
• Bits 7:4 – DT1AH[3:0]: Dead Time Value for OC1A Output
The dead time value for the OC1A output. The dead time delay is set as a number of the pres-
caled timer/counter clocks. The minimum dead time is zero and the maximum dead time is the
prescaled time/counter clock period multiplied by 15.
• Bits 3:0 – DT1AL[3:0]: Dead Time Value for OC1A Output
The dead time value for the OC1A output. The dead time delay is set as a number of the pres-
caled timer/counter clocks. The minimum dead time is zero and the maximum dead time is the
prescaled time/counter clock period multiplied by 15.
The dead time value register Bis an 8-bit read/write register.
The dead time delay of is adjusted by the dead time value register, DT1B. The register consists
of two fields, DT1BH[3:0] and DT1BL[3:0], one for each complementary output. Therefore a dif-
ferent dead time delay can be adjusted for the rising edge of OC1A and the rising edge of OC1A.
• Bits 7:4 – DT1BH[3:0]: Dead Time Value for OC1B Output
The dead time value for the OC1B output. The dead time delay is set as a number of the pres-
caled timer/counter clocks. The minimum dead time is zero and the maximum dead time is the
prescaled time/counter clock period multiplied by 15.
• Bits 3:0 – DT1BL[3:0]: Dead Time Value for OC1B Output
The dead time value for the OC1B output. The dead time delay is set as a number of the pres-
caled timer/counter clocks. The minimum dead time is zero and the maximum dead time is the
prescaled time/counter clock period multiplied by 15.
Bit
0x25
Read/Write
Initial value
Bit
0x24
Read/Write
Initial value
DT1AH3
DT1BH3
R/W
R/W
7
0
7
0
DT1AH2
DT1BH2
R/W
R/W
6
0
6
0
DT1AH1
DT1BH1
R/W
R/W
5
0
5
0
DT1AH0
DT1BH0
R/W
R/W
4
0
4
0
DT1AL3
DT1BL3
R/W
R/W
3
0
3
0
DT1AL2
DT1BL2
R/W
R/W
2
0
2
0
DT1AL1
DT1BL1
R/W
R/W
1
0
1
0
DT1AL0
DT1BL0
R/W
R/W
0
0
0
0
2586N–AVR–04/11
DT1A
DT1B

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