PEB20256E-V21 Infineon Technologies, PEB20256E-V21 Datasheet - Page 59

IC CONTROLLER INTERFACE 388-BGA

PEB20256E-V21

Manufacturer Part Number
PEB20256E-V21
Description
IC CONTROLLER INTERFACE 388-BGA
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB20256E-V21

Function
Multichannel Network Interface Controller (MUNICH)
Interface
HDLC, PPP, Serial, TMA
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
200mA
Power (watts)
3W
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
388-BBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Circuits
-
Other names
PEB20256E-V21
PEB20256E-V21IN

Available stocks

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Manufacturer:
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Manufacturer:
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Quantity:
10 000
4.3
Each packet or part of a packet is referenced by a descriptor. The descriptors form a link
list, thus connecting all packets together. Packet data as well as descriptors are located
in system memory. Both the MUNICH256 and the system CPU operate on these data
structures.
Each logical channel has its dedicated linked list of descriptors, one for receive direction
and one for transmit direction. This type of data structure allows channel specific
memory organization which can be specified by the system processor. It provides an
optimized way to transfer data packets between the system processor and the
MUNICH256.
The MUNICH256 has a flexible DMA controller to transfer data either from the internal
receive buffer to the shared memory (receive direction) or from the shared memory to
the internal transmit buffer (transmit direction). Each DMA works on one linked list. Each
linked list located in system memory is associated with one of the 256 transmit channels
or one of 256 receive channels.
The address generator of the DMA controller supports full link list handling. Descriptors
are stored independently from the data buffers, thus allowing full scatter/gather
assembly and disassembly of data packets.
4.3.1
A descriptor is used to build a linked list, where each member of the linked list points to
a data section. A descriptor consists of four DWORDS
containing link and packet information, are provided by the system CPU and the last
DWORD contains status information, which is written when the MUNICH256 has
finished operation on a descriptor.
The data section itself can be of any size up to the maximum size of 65535 bytes per
descriptor and is defined in the first DWORD of a descriptor. Each logical data packet
can be split into one or multiple parts, where each part is referenced by one descriptor,
and all parts are referenced by a linked list of descriptors. The descriptor containing the
last part of a data packet is marked with a frame end bit. The descriptor following the
marked descriptor therefore contains the beginning of the next data packet (Figure 4-7).
The last descriptor in a linked list is marked with a hold indication.
For ease of programming the transmit descriptor and the receive descriptor are
structured the same way, thus allowing to link a receive descriptor directly into the linked
list of the transmit queues with minimum descriptor processing.
1)
Data Sheet
Data Management Unit
Descriptor Concept
59
1)
. The first three DWORDS,
Functional Description
PEB 20256 E
PEF 20256 E
04.2001

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