MT90869AG Zarlink, MT90869AG Datasheet - Page 55

• Manufacturer Part Number: MT90869AG
• Description: Switch Fabric 16K x 16K/8K x 8K 1.8V/3.3V 272-Pin BGA Tray
• Manufacturer: Zarlink

Specifications of MT90869AG

• Package: 272BGA
• Number Of Ports: 64
• Fabric Size: 16K x 16K|8K x 8K
• Switch Core: Non-Blocking|Blocking
• Port Speed: 8.192|4.096|2.048 Mbps
• Operating Supply Voltage: 1.8|3.3 V

13.4
Address 0003h to 0022h.
Thirty-two local input channel delay registers (LCDR0 to LCDR31) allow users to program the input channel delay
for the local input data streams LSTi0-31. The possible adjustment is 255 channels and the LCDR0 to LCDR31
registers are configured as follows:
(where n = 0 to
LCDRn Bit
Bit
5
4
3
2
1
0
15-8
7-0
31)
Local Input Channel Delay Registers (LCDR0 to LCDR31)
LOCKL
PRSTL
CBERL
SBERRXL
SBERTXL
PRBSL
Name
Reserved
LCD(7:0)
Name
Table 18 - Bit Error Rate Test Control Register (BERCR) Bits
RESET
Table 19 - Local Channel Delay Register (LCDRn) Bits
0
0
0
0
0
0
Local Lock (READ ONLY).
This bit is automatically set HIGH when the receiver has locked to the
incoming data sequence. The bit is reset by a LOW to HIGH transition on
SBERRXL
PBER Reset for Local.
A LOW to HIGH transition initializes the local BER generator to the seed
value.
Clear Bit Error Rate Register for Local.
A LOW to HIGH transition resets the local internal bit error counter and the
local bit error (LBERR) register to zero.
Start Bit Error Rate Receiver for Local.
A LOW to HIGH transition enables the Local BER receiver. The receiver
monitors incoming data for reception of the seed value. When detected, the
LOCK state is indicated (LOCKL) and the receiver compares the incoming bits
with the reference generator for bit equality and increments the Local Bit error
Register (LBCR) on each failure. When set LOW, bit comparison is disabled
and the error count is frozen. The error count is stored in the Local Bit Error
Register (LBCR).
Start Bit Error Rate Transmitter for Local.
A LOW to HIGH transition enables the Local BER transmission. When set
LOW, transmission is disabled.
BER Mode Select for Local.
When set HIGH, a PRBS sequence of length 2
port. When set LOW, a PRBS sequence of length 2
Local port.
Reset
0
0
Zarlink Semiconductor Inc.
Reserved
Local Channel Delay Register
The binary value of these bits refers to the channel delay value
for the local input stream.
MT90869
55
Description
Description
23
-1 is selected for the Local
15
-1 is selected for the
Data Sheet
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