MT90869AG Zarlink, MT90869AG Datasheet - Page 31

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MT90869AG

Manufacturer Part Number
MT90869AG
Description
Switch Fabric 16K x 16K/8K x 8K 1.8V/3.3V 272-Pin BGA Tray
Manufacturer
Zarlink
Datasheet

Specifications of MT90869AG

Package
272BGA
Number Of Ports
64
Fabric Size
16K x 16K|8K x 8K
Switch Core
Non-Blocking|Blocking
Port Speed
8.192|4.096|2.048 Mbps
Operating Supply Voltage
1.8|3.3 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT90869AG
Manufacturer:
ZARLINK
Quantity:
2 388
Part Number:
MT90869AG2
Manufacturer:
ZARLINK
Quantity:
96
4.2
The input pin, BORS, selects whether the Backplane output streams, BSTo0-31 are set to high impedance at the
output of the MT90869 itself, or are always driven (active HIGH or active LOW) and a high impedance state, if
required on a per-channel basis, is invoked through an external interface circuit controlled by the BCSTo0-3
signals. Setting BORS to a LOW state will configure the output streams, BSTo0-31, to transmit bi-state channel
data with per-channel high-impedance determined by external circuits under the control of the BCSTo0-3 outputs.
Setting BORS to a HIGH state will configure the output streams, BSTo0-31, of the MT90869 to invoke a high-
impedance output on a per-channel basis.
(16 Mb/s)
(8 Mb/s)
(2 Mb/s)
LCSTo0
LCSTo1
LCSTo2
LCSTo3
(4 Mb/s)
LSTo1
LSTo0
LSTo7
LSTo6
Backplane High Impedance Control
FP8o
C8o
Figure 13 - Local Port External High Impedance Control Bit Timing (ST-Bus Mode)
Chan 127
Chan 63
Chan 31
1
Bit 0
Bit 0
Bit 0
0
Chan 0
7
Bit 7
Chan 0 Bit 7
Channel 0
6
Chan 0
5
Bit 6
Channel 0 Bit 7
4
Chan 0
3
Bit 5
Chan 0 Bit 6
2
Zarlink Semiconductor Inc.
Chan 0
1
MT90869
Bit 4
0
31
Chan 127
7
Bit 3
Chan 63 Bit 1
6
One C16o period
Channel 255 bits 7-0
Chan 127
5
Channel 31 Bit 0
Bit 2
4
Chan 127
3
Bit 1
Chan 63 Bit 0
2
Chan 127
1
Bit 0
0
Chan 0
7
Chan 0
Chan 0
Bit 7
Bit 7
Bit 7
Data Sheet
6

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