SAA7115HL/V1,518 NXP Semiconductors, SAA7115HL/V1,518 Datasheet - Page 328

• Manufacturer Part Number: SAA7115HL/V1,518
• Description: IC DIGITAL VIDEO DECODER 100LQFP
• Manufacturer: NXP Semiconductors
• Type: Video Decoderr

Specifications of SAA7115HL/V1,518

• Package / Case: 100-LQFP
• Applications: Set-Top Boxes
• Mounting Type: Surface Mount
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Voltage - Supply, Digital: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935270666518; SAA7115HLBE-T; SAA7115HLBE-T

Philips Semiconductors
Clipped signed subtract
SYNTAX
FUNCTION
DESCRIPTION
[2
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r30 = 0x1200, r40 = 0xff
r10 = 0, r30 = 0x1200, r40 = 0xff
r20 = 1, r30 = 0x1200, r40 = 0xff
r50 = 0x7fffffff, r90 = 0xffffffff
r70 = 0x80000000, r80 = 1
As shown below, the
The
31
[ IF rguard ] dspisub rsrc1 rsrc2 → rdest
if rguard then {
}
rsrc1
–1..–2
temp ← sign_ext32to64(rsrc1) – sign_ext32to64(rsrc2)
if temp < 0xfffffffff80000000 then
else if temp > 0x000000007fffffff then
else
dspisub
31
rdest ← 0x80000000
rdest ← 0x7fffffff
rdest ← temp<31:0>
31
Initial Values
] (or [0x7fffffff..0x80000000]), and stores the clipped value into rdest. All values are signed integers.
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
dspisub
Full-precision
33-bit result
signed
rdest
operation computes the difference rsrc1–rsrc2, clips the result into the 32-bit range
32
31
dspisub r30 r40 → r60
IF r10 dspisub r30 r40 → r80
IF r20 dspisub r30 r40 → r100
dspisub r50 r90 → r110
dspisub r70 r80 → r120
0
Clip to [2
Operation
signed
signed
31
−
–1..–2
PRELIMINARY SPECIFICATION
rsrc2
31
31
]
PNX1300/01/02/11 DSPCPU Operations
0
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r60 ← 0x1101
no change, since guard is false
r100 ← 0x1101
r110 ← 0x7fffffff
r120 ← 0x80000000
dspiabs dspiadd dspimul
dspuadd dspumul dspusub
signed
ATTRIBUTES
SEE ALSO
Result
dspisub
dspalu
1, 3
No
68
—
0
2
2
A-30