Z16FMC64AG20EG Zilog, Z16FMC64AG20EG Datasheet - Page 76

• Manufacturer Part Number: Z16FMC64AG20EG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20EG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: - 40 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

Table 30. System Exception Register Low (SYSEXCPL)
PS028702-1210
Bits
4
3
2:0
Bits
Field
RESET
R/W
ADDR
Bits
[7:3]
2
1
0
Last IRQ Register
Description (Continued)
DIVOVF – Divide Over Flow
If this bit is 1, a divide overflow occurred. A divide overflow happens when the result is greater
than FFFFFFFFH. Writing a 1 to this bit clears it to 0.
ILL – Illegal Instruction
If this bit is 1, an illegal instruction occurred. Writing a 1 to this bit clears it to 0.
These bits are reserved.
Description
These bits are reserved.
WDTOSC – WDT Oscillator Fail
If this bit is 1, a WDT oscillator fail exception occurred. Writing a 1 to this bit clears it to 0.
PRIOSC – Primary Oscillator Fail
If this bit is 1, a primary oscillator fail exception occurred. Writing a 1 to this bit clears it to 0.
WDT – Watchdog Timer Interrupt
If this bit is 1, a WDT exception occurred. Writing a 1 to this bit clears it to 0.
R/W1C
7
0
When an interrupt occurs, the 5th bit value of the interrupt vector is stored in the register.
This register allows the software to determine which interrupt source was last serviced. It
is used by RTOS which have a single interrupt entry point. To implement this the software
must set all interrupt vectors to the entry point address. The entry point service routine
then reads this register to determine which source caused the interrupt or exception and
respond accordingly.
R/W1C
6
0
Reserved
R/W1C
5
0
P R E L I M I N A R Y
R/W1C
4
0
FF_E021H
R/W1C
Z16FMC Series Motor Control MCUs
3
0
WDTOSC
R/W1C
2
0
Product Specification
PRIOSC
R/W1C
Interrupt Controller
1
0
R/W1C
WDT
0
0
54