Z16FMC64AG20EG Zilog, Z16FMC64AG20EG Datasheet - Page 127

• Manufacturer Part Number: Z16FMC64AG20EG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20EG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: - 40 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

Table 68. Watchdog Timer Approximate Timeout Delays
PS028702-1210
WDT Reload Value
Watchdog Timer Refresh
Watchdog Timer Timeout Response
(Hex)
FFFF
0400
When enabled first, the WDT is loaded with the value in the Watchdog Timer Reload reg-
isters. The WDT then counts down to
CPU. Execution of the
WDT Reload value stored in the Watchdog Timer Reload registers. Counting resumes fol-
lowing the reload operation.
When the Z16FMC device is operating in DEBUG mode (through the OCD), the WDT is
continuously refreshed to prevent spurious WDT time-outs.
The WDT times out when the counter reaches
either a system exception or a short reset. The
response of the WDT. For information about programming of the
the
WDT System Exception in Normal Operation
If configured to generate a system exception when a timeout occurs, the WDT issues an
exception request to the interrupt controller. The CPU responds to the request by fetching
the System Exception vector and executing code from the vector address. After timeout
and system exception generation, the WDT is reloaded automatically and continues count-
ing.
WDT System Exception in STOP Mode
If configured to generate a system exception when a timeout occurs and the Z16FMC
device is in STOP mode, the WDT automatically initiates a Stop Mode Recovery and gen-
erates a system exception request. Both the WDT status bit and the STOP bit in the
Status and Control Register
detailed information, see the
Following completion of the Stop Mode Recovery, the CPU responds to the system excep-
tion request by fetching the System Exception vector and executing code from the vector
address.
Option Bits
WDT Reload Value
(Decimal)
65,536
chapter on page 249.
1024
WDT
P R E L I M I N A R Y
instruction causes the downcounter to be reloaded with the
are set to 1 following WDT timeout in STOP mode. For
Reset and Stop Mode Recovery
Typical
102.4 ms
6.55 s
(with 10 kHz typical WDT oscillator frequency)
0000H
Approximate Timeout Delay
unless a
WDT_RES
0000H
Description
Reset value timeout delay
Maximum timeout delay
Z16FMC Series Motor Control MCUs
. A timeout of the WDT generates
WDT
option bit determines the timeout
instruction is executed by the
chapter on page 29.
Product Specification
WDT_RES
Watchdog Timer
option bit, see
Reset
105