Z16FMC64AG20EG Zilog, Z16FMC64AG20EG Datasheet - Page 104

• Manufacturer Part Number: Z16FMC64AG20EG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20EG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: - 40 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

PS028702-1210
Bit Position
[5–3]
Value (H)
000
001
010
011
100
101
110
111
PRES
Description (Continued)
The timer input clock is divided by 2
The prescaler is reset each time the timer is disabled. This ensures proper
clock division each time the timer is restarted.
Divide by 1
Divide by 2
Divide by 4
Divide by 8
Divide by 16
Divide by 32
Divide by 64
Divide by 128
PWM DUAL OUTPUT mode – If enabled, the timer output is set=TPOL
after PWM match and set = TPOL after Reload. If enabled the timer
output complement takes on the opposite value of the timer output. The
PWMD field in the T0CTL1 Register determines an optional added delay
on the assertion (Low to High) transition of both timer output and the
timer output complement for deadband generation.
CAPTURE RESTART mode – If the timer is enabled, the timer output
signal is complemented after timer Reload.
0 = Count is captured on the rising edge of the timer input signal.
1 = Count is captured on the falling edge of the timer input signal.
ANALOG
the timer output signal is complemented after timer Reload.
0 = Count is captured on the rising edge of the timer input signal.
1 = Count is captured on the falling edge of the timer input signal.
TRIGGERED ONE-SHOT mode – If the timer is enabled, the timer
output signal is complemented after timer Reload.
0 = The timer triggers on a Low to High transition on the input.
1 = The timer triggers on a High to Low transition on the input.
P R E L I M I N A R Y
COMPARATOR COUNTER mode – If the timer is enabled,
Z16FMC Series Motor Control MCUs
PRES
, where PRES is set from 0 to 7.
Product Specification
Timers
82