N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 84

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N25Q064A13EF640F

Manufacturer Part Number
N25Q064A13EF640F
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of N25Q064A13EF640F

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Instructions
9.1.31
84/150
S
C
DQ0
DQ1
S
C
DQ0
DQ1
While the Write Non Volatile Configuration register cycle is in progress, it is possible to
monitor the end of the process by polling status Register write in progress (WIP) bit or the
Flag Status Register Program/Erase Controller bit. The write in progress (WIP) bit is 1
during the self-timed Write Non Volatile Configuration register cycle, and is 0 when it is
completed. When the cycle is completed, the write enable latch (WEL) is reset.
The Write Non Volatile Configuration register (WRNVCR) instruction allows the user to
change the values of all the Non Volatile Configuration Register bits, described in
Non-Volatile Configuration
The Write Non Volatile Configuration Register impacts the memory behavior only after the
next power on sequence.
Figure 38. Write NV Configuration Register instruction sequence
Read Volatile Configuration Register
The Read Volatile Configuration Register (RDVCR) instruction allows the Volatile
Configuration Register to be read. See
Figure 39. Read Volatile Configuration Register instruction sequence
0
High Impedance
0
1
1
High Impedance
2
Instruction
2
Instruction
3
3
4
4
5
5
6
6
7
Register.
7
7
8
7
Volatile Configuration
6
8
9 10 11 12 13 14 15
6
5
9 10 11 12 13 14 15
Register Out
5
MSB
4
LS Byte
Table 5.: Volatile Configuration
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Byte
4
3
3
2
2
1
1
0
NVCR In
0
7
15 14 13 12
Volatile Configuration
16 17 18 19 20
6
5
Register Out
©2010 Micron Technology, Inc. All rights reserved.
MS Byte
MSB
4
Byte
3
Register.
11 10 9
2
1
21 22 23 24
N25Q064 - 3 V
0
Table 3.:
8
7

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