N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 25
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N25Q064A13EF640F
Manufacturer Part Number
N25Q064A13EF640F
Description
Manufacturer
Micron Technology Inc
Datasheet
1.N25Q064A13EF640F.pdf
(150 pages)
Specifications of N25Q064A13EF640F
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N25Q064 - 3 V
5.2
5.2.1
5.2.2
5.2.3
The Hold/Reset feature can be disabled by using of the bit 4 of the VECR.
Dual SPI (DIO-SPI) Protocol
In the Dual SPI (DIO-SPI) protocol all the instructions, addresses and I/O data are
transmitted on two data lines. All the functionality available in the Extended SPI protocol is
also available in the DIO-SPI protocol. The DIO-SPI instructions are comparable with the
Extended SPI instructions; however, in DIO-SPI, the instructions are multiplexed on the two
data lines, DQ0 and DQ1.
The only exceptions are the READ, Quad Read, and Program instructions, which are not
available in DIO-SPI protocol, and the RDID instruction, which is replaced in the DIO-SPI
protocol by the Multiple I/O Read Identification (MIORDID) instruction.
The Multiple I/O Read Identification Instruction reads just the standard SPI electronic ID (3
bytes), while the Extended SPI protocol RDID instruction allows access to the UID bytes.
To help the application code port from Extended SPI to DIO-SPI protocol, the instructions
available in the DIO-SPI protocol have the same operation code as the Extended SPI
protocol, the only exception being the MIORDID instruction.
Multiple Read Identification
The Multiple I/O Read Identification (MIORDID) instruction is available to read the device
electronic ID.With respect to the RDID instruction of the Extended SPI protocol, the output
data, shifted out on the 2 data lines DQ0 and DQ1.
Since the read ID instruction in the DIO-SPI protocol is limited to 3 bytes of the standard
electronic ID, the UID bytes are not read with the MIORDID instruction
Dual Command Fast reading
Reading the memory data multiplexing the instruction, the addresses and the output data on
2 data lines can be achieved in DIO-SPI protocol by mean of the Dual Command Fast Read
instruction, that has 3 instruction codes (BBh, 3Bh and 0Bh) to help the application code
porting from Extended SPI protocol to DIO-SPI protocol. Of course quad and single I/O
Read instructions are not available in DIO-SPI mode.
For Dual Command fast read instructions the number of dummy clock cycles is configurable
by using VCR bits [7:4] or NVCR bits [15:12].
After a successful reading instruction, a reduced tSHSL equal to 20ns is allowed to further
improve random access time (in all the other cases tSHSL should be at least 50 ns). See
Table 31.: AC
Page programming
Programming the memory by transmitting the instruction, addresses and the output data on
2 data lines can be achieved in DIO-SPI protocol by using the Dual Command Page
Program instruction, that has 3 instruction codes (D2h, A2h and 02h) to help port from
Extended SPI protocol to DIO-SPI protocol
Quad and single input Program instructions are not available in DIO-SPI mode.
Characteristics.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2010 Micron Technology, Inc. All rights reserved.
Operating features
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