N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 33

• Manufacturer Part Number: N25Q064A13EF640F
• Manufacturer: Micron Technology Inc

Specifications of N25Q064A13EF640F

• Lead Free Status / Rohs Status: Supplier Unconfirmed

N25Q064 - 3 V
6.2
Table 3.
NVCR<15:12>
Bit
Non Volatile Configuration Register
The Non Volatile Configuration Register (NVCR) bits affects the default memory
configuration after power-on. It can be used to make the memory start in the configuration to
fit the application requirements.
The device is delivered with Non Volatile Configuration Register (NVCR) bits all erased to 1
(FFFFh).
The purpose of the NVCR is to define the default memory settings after the power-on
sequence related to many features:
The NVCR can be read by the Read Non Volatile Configuration Register (RDNVCR)
instruction and written by the Write Non Volatile Configuration Register (WRNVCR) in all the
3 available SPI protocols. See the sections that follow as well as
Configuration
Non-Volatile Configuration Register
Dummy clock
cycle
The number of dummy clock cycle for fast read instructions,
XIP mode configurations,
output driver strengths,
Reset (or Hold) disabling
Multiple I/O protocol enabling.
Parameter
Register.
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Value
As '1111'
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Target on maximum
allowed frequency fc
(108MHz) and to
guarantee backward
compatibility (default)
Description
Micron Technology, Inc., reserves the right to change products or specifications without notice.
To optimize instruction execution
(FASTREAD, DOFR,DIOFR,QOFR,
QIOFR, ROTP) according to the frequency
Volatile and Non Volatile Registers
©2010 Micron Technology, Inc. All rights reserved.
Table 3.: Non-Volatile
Note
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