N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 102
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N25Q064A13EF640F
Manufacturer Part Number
N25Q064A13EF640F
Description
Manufacturer
Micron Technology Inc
Datasheet
1.N25Q064A13EF640F.pdf
(150 pages)
Specifications of N25Q064A13EF640F
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Instructions
9.2.24
9.2.25
102/150
Read Volatile Enhanced Configuration Register
The Read Volatile Enhanced Configuration Register (RDVECR) instruction allows the
Volatile Configuration Register to be read.
Figure 68. Read Volatile Enhanced Configuration Register instruction sequence
Write Volatile Enhanced Configuration Register
The Write Volatile Enhanced Configuration register (WRVECR) instruction allows new
values to be written to the Volatile Enhanced Configuration register. Before it can be
accepted, a write enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code and the input data on the two pins DQ0
and DQ1, the instruction functionality is exactly the same as the Write Volatile Enhanced
Configuration Register (WRVECR) instruction of the Extended SPI protocol, please refer to
Section 9.1.34: Write Volatile Enhanced Configuration Register
Figure 69. Write Volatile Enhanced Configuration Register instruction sequence
DQ0
DQ1
C
S
DQ0
DQ1
C
S
DIO-SPI
DIO-SPI
0
Instruction
0
1
Instruction
2
1
3
2
7
6
4
Configuration Register Out
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
5
4
5
Byte
Volatile Enhanced
3
7
2
6
6
4
1
Configuration Register In
0
7
5
4
5
Byte
7
6
Volatile Enhanced
8
3
2
6
5
4
9 10 11
Byte
1
0
3
7
2
1
0
©2010 Micron Technology, Inc. All rights reserved.
for further details.
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