N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 121
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N25Q064A13EF640F
Manufacturer Part Number
N25Q064A13EF640F
Description
Manufacturer
Micron Technology Inc
Datasheet
1.N25Q064A13EF640F.pdf
(150 pages)
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N25Q064 - 3 V
9.3.21
Figure 93. Read NV Configuration Register instruction sequence QIO-SPI
Write NV Configuration Register
The Write Non Volatile Configuration register (WRNVCR) instruction allows new values to
be written to the Non Volatile Configuration register. Before it can be accepted, a write
enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code and the input data on the four pins DQ0,
DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the Write Non
Volatile Configuration Register (WRNVCR) instruction of the Extended SPI protocol, please
refer to
Section 9.1.30: Write NV Configuration Register
DQ0
DQ3
DQ1
DQ2
S
C
Instruction
0
1
LS Byte MS Byte
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Nonvolatile Configuration
2
5
4
6
7
3
1 13 9
0 12 8
2 14 10
3 15 11
Register Out
4
5
for further details.
©2010 Micron Technology, Inc. All rights reserved.
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