DS3134 Maxim Integrated Products, DS3134 Datasheet - Page 89

IC CTRLR HDLC CHATEAU 256-BGA

DS3134

Manufacturer Part Number
DS3134
Description
IC CTRLR HDLC CHATEAU 256-BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3134

Controller Type
HDLC Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
500mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Bits 0 to 7 / HDLC Channel ID (HCID0 to HCID7).
Bit 14 / Indirect Access Read/Write (IARW). When the host wishes to write data to set the internal
Receive Starting Block Pointer, this bit should be written to a zero by the host. This causes the device to
take the data that is currently present in the RFSBP register and write it to the channel location indicated
by the HCID bits. When the device has completed the write, the IAB will be set to zero.
Note: The RFSBP is a write only register. Once this register has been written to and operation started,
DS3134 internal state machine will change the value in this register.
Bit 15 / Indirect Access Busy (IAB). When an indirect read or write access is in progress, this read only
bit will be set to a one. During a read operation, this bit will be set to a one until the data is ready to be
read. It will be set to zero when the data is ready to be read. During a write operation, this bit will be set
to a one while the write is taking place. It will be set to zero once the write operation has completed.
Register Name:
Register Description: Receive FIFO Starting Block Pointer
Register Address:
Note: Bits that are underlined are read only, all other bits are read-write.
Bits 0 to 9 / Starting Block Pointer (RSBP0 to RSBP9). These 10 bits determine which of the
1024 blocks within the receive FIFO, the host wants the device to configure as the starting block for a
particular HDLC channel. Any of the blocks within a chain of blocks for a HDLC channel can be
configured as the starting block. When these 10 bits are read, they will report the current Block Pointer
being used to write data into the Receive FIFO from the HDLC Layer 2 engines.
RSBP7
n/a
15
7
00000000 (00h) = HDLC Channel Number 1
11111111 (FFh) = HDLC Channel Number 256
0000000000 (000h) = Use Block 0 as the Starting Block
0111111111 (1FFh) = Use Block 511 as the Starting Block
1111111111 (3FFh) = Use Block 1023 as the Starting Block
RSBP6
n/a
14
6
RFSBP
0904h
RSBP5
n/a
13
5
RSBP4
n/a
12
4
RSBP3
89 of 203
n/a
11
3
RSBP2
n/a
10
2
RSBP1
RSBP9
1
9
RSBP0
RSBP8
0
8
DS3134

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