DS3134 Maxim Integrated Products, DS3134 Datasheet - Page 113
DS3134
Manufacturer Part Number
DS3134
Description
IC CTRLR HDLC CHATEAU 256-BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3134.pdf
(203 pages)
Specifications of DS3134
Controller Type
HDLC Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
500mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Manufacturer:
DALLAS
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DS3134 (BGA256)
Manufacturer:
DALLAS
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Receive Done Queue Internal Address Storage Table 8.1.4A
Register Name
Receive Done Queue Base Address 0 (lower word)
Receive Done Queue Base Address 1 (upper word)
Receive Done Queue DMA Write Pointer
Receive Done Queue Host Read Pointer
Receive Done Queue End Address
Receive Done Queue FIFO Flush Timer
Note:
1) Receive Done Queue End Address is not an absolute address. The absolute end address is “Base +
Receive Done Queue Structure Figure 8.1.4B
Done Queue DMA Write Pointer
Once the Receive DMA is activated (via the RDE control bit in the Master Configuration register; see
Section 4 for more details), it can begin writing data to the Done Queue. It knows where to write data
into the Done Queue by reading the Write Pointer and adding it to the Base Address to obtain the actual
32-bit address. Once the DMA has written to the Done Queue, it increments the Write Pointer by one
dword. A check must be made to make sure the incremented address does not exceed the Receive Done
Queue End Address. If the incremented address does exceed this address, then the incremented write
pointer will be set equal to 0000h (i.e. the Base Address).
Done Queue Host Read Pointer
Maximum of 65536
Done Queue Descriptors
RDQEA * 4 ”.
dmardq
Base + End Address
Base + 00h
Base + 04h
Base + 08h
Base + 0Ch
Base + 10h
Base + 14h
Done Queue Descriptor
Done Queue Descriptor
Done Queue Descriptor
Done Queue Descriptor
Done Queue Descriptor
Done Queue Descriptor
Done Queue Descriptor
113 of 203
Host Processed
Host Processed
Host Processed
DMA Readied
DMA Readied
DMA Readied
DMA Readied
Acronym
RDQBA0
RDQBA1
RDQWP
RDQRP
RDQEA
RDQFFT
Address
073Ch
0730h
0734h
0740h
0738h
0744h
DS3134
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