DS3134 Maxim Integrated Products, DS3134 Datasheet - Page 143

• Manufacturer Part Number: DS3134
• Description: IC CTRLR HDLC CHATEAU 256-BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3134

• Controller Type: HDLC Controller
• Interface: Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 500mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

- FOR DMA USAGE ONLY / HOST CAN ONLY READ THIS FIELD -
dword 3; Bits 16 to 31 / Last Pending Descriptor Pointer. This 16-bit value is the offset from the
Transmit Descriptor Base Address of the first Transmit Packet Descriptor for the packet that is queued up
last for transmission.
- FOR DMA USAGE ONLY / HOST CAN ONLY READ THIS FIELD -
dword 4; Bits 0 to 15 / Next Priority Descriptor Pointer. This 16-bit value is the offset from the
Transmit Descriptor Base Address of the next Transmit Priority Packet Descriptor for the priority packet
that is currently being transmitted. Only valid if EOF = 0 or if EOF = 1 and CV = 1.
- FOR DMA USAGE ONLY / HOST CAN ONLY READ THIS FIELD -
dword 4; Bits 16 to 31/ Unused. This field is not used by the DMA and could be any value when read.
- FOR DMA USAGE ONLY / HOST CAN ONLY READ THIS FIELD -
dword 5; Bits 0 to 15 / Last Priority Pending Descriptor Pointer. This 16-bit value is the offset from
the Transmit Descriptor Base Address of the first Transmit Priority Packet Descriptor for the priority
packet that is queued up last for transmission.
- FOR DMA USAGE ONLY / HOST CAN ONLY READ THIS FIELD -
dword 5; Bits 16 to 31 / Next Priority Pending Descriptor Pointer. This 16-bit value is the offset from
the Transmit Descriptor Base Address of the first Transmit Priority Packet Descriptor for the packet
priority that is queued up next for transmission.
Register Name:
Register Description: Transmit DMA Configuration Indirect Select
Register Address:
Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.
Bits 0 to 7 / HDLC Channel ID (HCID0 to HCID7).
HCID7
IAB
15
7
00000000 (00h) = HDLC Channel Number 1
11111111 (FFh) = HDLC Channel Number 256
HCID6
IARW
14
6
TDMACIS
0870h
HCID5
n/a
13
5
HCID4
n/a
12
4
TDCW3
143 of 203
HCID3
11
3
TDCW2
HCID2
10
2
TDCW1
HCID1
1
9
TDCW0
HCID0
0
8
DS3134