DS3134 Maxim Integrated Products, DS3134 Datasheet - Page 73

• Manufacturer Part Number: DS3134
• Description: IC CTRLR HDLC CHATEAU 256-BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3134

• Controller Type: HDLC Controller
• Interface: Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 500mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Bit 11 / Repetitive Pattern Length Bit 3 (RPL3).
RPL0 is the LSB and RPL3 is the MSB of a nibble that describes the how long the repetitive pattern is.
The valid range is 17 (0000) to 32 (1111). These bits are ignored if the receive BERT is programmed for
a pseudorandom pattern. To create repetitive patterns less than 17 bits in length, the user must set the
length to an integer number of the desired length that is less than or equal to 32. For example, to create a
6 bit pattern, the user can set the length to 18 (0001) or to 24 (0111) or to 30 (1101).
Repetitive Pattern Length Map
Length
17 Bits
21 Bits
25 Bits
29 Bits
Bit 13 / Interrupt Enable for Counter Overflow (IEOF). Allows the receive BERT to cause an
interrupt if either the Bit Counter or the Error Counter overflows.
Bit 14 / Interrupt Enable for Bit Error Detected (IEBED). Allows the receive BERT to cause an
interrupt if a bit error is detected.
Bit 15 / Interrupt Enable for Change of Synchronization Status (IESYNC). Allows the receive
BERT to cause an interrupt if there is a change of state in the synchronization status (i.e. the receive
BERT either goes into or out of synchronization).
Register Name:
Register Description: BERT Control Register 1
Register Address:
Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.
Bit 0 / Transmit Pattern Load (TC). A low to high transition loads the pattern generator with
Repetitive or pseudorandom pattern that is to be generated. This bit should be toggled from low to high
whenever the host wishes to load a new pattern. Must be cleared and set again for a subsequent loads.
EIB2
15
7
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
Code
0000
0100
1000
1100
EIB1
14
6
BERTC1
0504h
Length
18 Bits
22 Bits
26 Bits
30 Bits
EIB0
13
5
Alternating Word Count
Code
0001
0101
1001
1101
SBE
12
4
Length
19 Bits
23 Bits
27 Bits
31 Bits
73 of 203
n/a
11
3
Code
0010
0110
1010
1110
n/a
10
2
Length
20 Bits
24 Bits
28 Bits
32 Bits
n/a
1
9
Code
0011
0111
1011
1111
TC
0
8
DS3134