Z8523008PSG Zilog, Z8523008PSG Datasheet - Page 87
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Z8523008PSG
Manufacturer Part Number
Z8523008PSG
Description
IC 8MHZ ESCC 40-DIP
Manufacturer
Zilog
Datasheet
1.Z8523008PSG.pdf
(117 pages)
Specifications of Z8523008PSG
Controller Type
Serial Communications Controller (SCC)
Interface
Bus
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
4mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Operating Supply Voltage
5 V
Supply Current (max)
9 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3917
Z8523008PSG
Z8523008PSG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8523008PSG
Manufacturer:
Zilog
Quantity:
177
Table 43. Z80230 General Timing Characteristics (Continued)
Table 44. Z80230 AC Characteristics
PS005303-0907
No.
Notes:
No
1
2
3
4
5
6
7
8
9
10
11
12
1. RxC is RTxC or TRxC, whichever is supplying the receive clock.
2. TxC is TRxC or RTxC, whichever is supplying the transmit clock.
3. Both RTxC and SYNC have 30 pf capacitors to ground connected to them.
4. Synchronization of RxC to PCLK is eliminated in divide by four operation.
5. Parameter applies only to FM encoding/decoding.
6. Parameter applies only for transmitter and receiver; DPLL and BRG timing requirements are identical to PCLK
7. The maximum transmit or receive data rate is 1/4 PCLK.
8. Applies to the DPLL clock source only. Maximum data rate of 1/4 PCLK still applies. DPLL clock must have a
9. Units in nanoseconds (ns).
10. Units in TcPc.
requirements.
50% duty cycle.
Symbol
Symbol
TwAS
TdDS(AS)
TsCS0(AS)
ThCS0(AS)
TsCS1(DS)
ThCS1(DS)
TsIA(AS)
ThIA(AS)
TsRWR(DS) R/W (Read) to DS Fall Setup
ThRW(DS)
TsRWW(DS) R/W (Write) to DS Fall Setup
TdAS(DS)
Table 44
Parameter
AS Low Width
DS Rise to AS Fall Delay
CS0 to AS Rise Setup Time
CS0 to AS Rise Hold Time
CS1 to DS Fall Setup Time
CS1 to DS Rise Hold Time
INTACK to AS Rise Setup Time
INTACK to AS Rise Hold Time
Time
R/W to DS Rise Hold Time
Time
AS Rise to DS Fall Delay
Parameter
summarizes the Z80230 Read and Write AC characteristics.
Min.
30
10
0
20
50
20
10
125
50
0
0
20
Min.
10 MHz
10 MHz
Max.
Max.
Min.
20
10
0
15
35
10
10
100
35
0
0
15
Product Specification
Min.
16 MHz
16 MHz
Electrical Characteristics
Max
Z85230/Z80230
Max.
Notes
8
1, 8
1, 8
1, 8
1, 8
1, 8
8
8
8
8
8
8
Notes
82