Z8523008PSG Zilog, Z8523008PSG Datasheet - Page 103

• Manufacturer Part Number: Z8523008PSG
• Description: IC 8MHZ ESCC 40-DIP
• Manufacturer: Zilog

Specifications of Z8523008PSG

• Controller Type: Serial Communications Controller (SCC)
• Interface: Bus
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 4mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Operating Supply Voltage: 5 V
• Supply Current (max): 9 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3917; Z8523008PSG

Z80230/Z85230 Errata
PS005303-0907
IUS Problem Description
The current revision of Zilog’s ESCC has six known bugs. This section identifies these
bugs and provides workarounds.
The IUS problem occurs under the following conditions:
•
•
This mode is intended for an application where received characters are read by a DMA
controller. EOF is treated differently from other special conditions (for example, parity
error, overrun error and CRC error).
When EOF is detected, the following conditions occur:
•
•
This feature allows the processor to service the EOF interrupt with more latency. Immedi-
ate attention from the processor is not necessary because the data FIFO is not locked.
Incoming data can still be delivered to the Receive FIFO and not get lost. It also allows for
operation with no servicing of the interrupt.
When the EOF interrupt (RCA interrupt) is serviced, the processor must use the
Highest IUS
If an EOF interrupt occurs when another lower priority interrupt is enabled (for example,
Ext/Status interrupt is being serviced) the
lower priority ISR (to clear out the pending interrupt) can accidentally clear the pending
EOF interrupt.
The
RCA IP bit) regardless of the priorities of the pending interrupts. This action causes errors
under the following circumstances:
•
•
SDLC 10x19 Status FIFO is enabled
Interrupts on Receive Special Conditions Only
A Receive Character Available (RCA) interrupt is generated, rather than the Special
Conditions interrupt, as in other operating modes.
The data FIFO is not locked, as in other operating modes, and is known as the Anti-
Lock feature.
Another ESCC interrupt is being serviced (for example, an Ext/Status interrupt for
Transmitter Underrun in Full Duplex operation)
The DMA reads a byte marked with EOF. The corresponding IP bit is set to 1 and the
INT line goes Low (highest priority interrupt in the daisy chain).
Reset Highest IUS
command to clear the EOF.
command clears the IP bit related to the EOF (in this mode, the
Reset Highest IUS
Product Specification
command issued by the
Z80230/Z85230 Errata
Z85230/Z80230
Reset
98