EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 342
![IC STRATIX IV FPGA 530K 1152HBGA](/photos/37/12/371227/1152pin_fbga_sml.jpg)
EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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10–10
Stratix IV Device Handbook Volume 1
In a multi-device FPP configuration, the first device’s nCE pin is connected to GND
while its nCEO pin is connected to nCE of the next device in the chain. The last
device’s nCE input comes from the previous device, while its nCEO pin is left floating.
After the first device completes configuration in a multi-device configuration chain,
its nCEO pin drives low to activate the second device’s nCE pin, which prompts the
second device to begin configuration. The second device in the chain begins
configuration within one clock cycle; therefore, the transfer of data destinations is
transparent to the MAX II device. All other configuration pins (nCONFIG, nSTATUS,
DCLK, DATA[7..0], and CONF_DONE) are connected to every device in the chain. The
configuration signals may require buffering to ensure signal integrity and prevent
clock skew problems. Ensure that the DCLK and DATA lines are buffered for every
fourth device. Because all device CONF_DONE pins are tied together, all devices
initialize and enter user mode at the same time.
All nSTATUS and CONF_DONE pins are tied together; if any device detects an error,
configuration stops for the entire chain and you must reconfigure the entire chain. For
example, if the first device flags an error on nSTATUS, it resets the chain by pulling its
nSTATUS pin low. This behavior is similar to a single device detecting an error.
If the Auto-restart configuration after error option is turned on, the devices release
their nSTATUS pins after a reset time-out period (a maximum of 500 μs). After all
nSTATUS pins are released and pulled high, the MAX II device tries to reconfigure the
chain without pulsing nCONFIG low. If this option is turned off, the MAX II device
must generate a low-to-high transition (with a low pulse of at least 2 μs) on nCONFIG
to restart the configuration process.
In a multi-device FPP configuration chain, all Stratix IV devices in the chain must
either enable or disable the decompression and/or design security features. You
cannot selectively enable the decompression and/or design security features for each
device in the chain because of the DATA and DCLK relationship. If the chain contains
devices that do not support design security, use a serial configuration scheme.
If a system has multiple devices that contain the same configuration data, tie all
device nCE inputs to GND and leave the nCEO pins floating. All other configuration
pins (nCONFIG, nSTATUS, DCLK, DATA[7..0], and CONF_DONE) are connected to
every device in the chain. Configuration signals may require buffering to ensure
signal integrity and prevent clock skew problems. Ensure that the DCLK and DATA
lines are buffered for every fourth device. Devices must be the same density and
package. All devices start and complete configuration at the same time.
Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
© March 2010 Altera Corporation
Fast Passive Parallel Configuration
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