PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 74

• Manufacturer Part Number: PNX1301EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1301EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
Table 4-1. Key Multimedia Custom Operations
Listed by Function Type
4-2
DSP
absolute
value
Shift
Clip
DSP add
DSP
multiply
DSP
subtract
Sum of
products
Merge,
pack
Byte
averages
Byte
multiplies
Motion
estima-
tion
Function
Min,max
dspiabs
dspidualabs
dualasr
dualiclipi
dualuclipi
quadumax
quadumin
dspiadd
dspuadd
dspidualadd
dspuquadaddui
dspimul
dspumul
dspidualmul
dspisub
dspusub
dspidualsub
ifir16
ifir8ii
ifir8iu
ufir16
ufir8uu
mergedual16lsb Merge dual-16 least-significant
mergelsb
mergemsb
pack16lsb
pack16msb
packbytes
quadavg
quadumulmsb
ume8ii
ume8uu
Custom Op
PRELIMINARY SPECIFICATION
Clipped signed 32-bit absolute
value
Dual clipped absolute values of
signed 16-bit halfwords
dual-16 arithmetic shift right
dual-16 clip signed to signed
dual-16 clip signed to unsigned
Unsigned bytewise quad max
Unsigned bytewise quad min
Clipped signed 32-bit add
Clipped unsigned 32-bit add
Dual clipped add of signed 16-
bit halfwords
Quad clipped add of unsigned/
signed bytes
Clipped signed 32-bit multiply
Clipped unsigned 32-bit multi-
ply
Dual clipped multiply of signed
16-bit halfwords
Clipped signed 32-bit subtract
Clipped unsigned 32-bit sub-
tract
Dual clipped subtract of signed
16-bit halfwords
Signed sum of products of
signed 16-bit halfwords
Signed sum of products of
signed bytes
Signed sum of products of
signed/unsigned bytes
Unsigned sum of products of
unsigned 16-bit halfwords
Unsigned sum of products of
unsigned bytes
bytes
Merge least-significant bytes
Merge most-significant bytes
Pack least-significant 16-bit
halfwords
Pack most-significant 16-bit
halfwords
Pack least-significant bytes
Unsigned byte-wise quad aver-
age
Unsigned quad 8-bit multiply
most significant
Unsigned sum of absolute val-
ues of signed 8-bit differences
Unsigned sum of absolute val-
ues of unsigned 8-bit differ-
ences
Description
ing the result(s) in the destination register. Otherwise,
their naming follows the rules given above where appro-
priate. For example, the dspuquadaddui operation imple-
ments four 8-bit additions; it treats the first operand of
each addition as unsigned, the second operand as
signed, and produces an unsigned result for each addi-
tion. Each result, which is computed with no loss of pre-
cision, is clipped into the representable range of a byte
(0..255).
Table 4-2. Key Multimedia Custom Operations
Listed by Operand Size
32-bit
16-bit
Op. Size
dspiabs
dspiadd
dspuadd
dspimul
dspumul
dspisub
dspusub
mergedual16lsb
dualasr
dualiclipi
dualuclipi
dspidualmul
dspidualabs
dspidualadd
dspidualsub
ifir16
ufir16
pack16lsb
pack16msb
Custom Op
Philips Semiconductors
Clipped signed 32-bit abs value
Clipped signed 32-bit add
Clipped unsigned 32-bit add
Clipped signed 32-bit multiply
Clipped unsigned 32-bit multi-
ply
Clipped signed 32-bit subtract
Clipped unsigned 32-bit sub-
tract
Merge dual-16 least-significant
bytes
dual-16 arithmetic shift right
dual-16 clip signed to signed
dual-16 clip signed to unsigned
Dual clipped multiply of signed
16-bit halfwords
Dual clipped absolute values of
signed 16-bit halfwords
Dual clipped add of signed 16-
bit halfwords
Dual clipped subtract of signed
16-bit halfwords
Signed sum of products of
signed 16-bit halfwords
Unsigned sum of products of
unsigned 16-bit halfwords
Pack least-significant 16-bit
halfwords
Pack most-significant 16-bit
halfwords
Description