PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 343

• Manufacturer Part Number: PNX1301EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1301EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
feqlflags
SYNTAX
FUNCTION
DESCRIPTION
rsrc1=rsrc2 and stores a bit vector representing the exception flags into rdest. The argument values are in IEEE
single-precision floating-point format; the result is an integer bit vector. The bit vector stored in rdest has the same
format as the IEEE exception bits in the PCSW. The exception flags in PCSW are left unchanged by this operation. If
an argument is denormalized, zero is substituted before computing the comparison, and the IFZ bit in the result is set.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-45
r30 = 0x40400000 (3.0), r40 = 0 (0.0)
r30 = 0x40400000 (3.0)
r10 = 0, r60 = 0x3f800000 (1.0),
r30 = 0x40400000 (3.0)
r20 = 1, r60 = 0x3f800000 (1.0),
r30 = 0x40400000 (3.0)
r30 = 0x40400000 (3.0),
r60 = 0x3f800000 (1.0)
r30 = 0x40400000 (3.0),
r61 = 0xffffffff (QNaN)
r50 = 0x7f800000 (+INF)
r55 = 0xff800000 (-INF)
r60 = 0x3f800000 (1.0),
r65 = 0x00400000 (5.877471754e-39)
r50 = 0x7f800000 (+INF)
The
The
[ IF rguard ] feqlflags rsrc1 rsrc2 → rdest
if rguard then
rdest ← ieee_flags((float)rsrc1 = (float)rsrc2)
feqlflags
feqlflags
31
0
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
operation computes the IEEE exceptions that would result from computing the comparison
PRELIMINARY SPECIFICATION
feqlflags r30 r40 → r80
feqlflags r30 r30 → r90
IF r10 feqlflags r60 r30 → r100
IF r20 feqlflags r60 r30 → r110
feqlflags r30 r60 → r120
feqlflags r30 r61 → r121
feqlflags r50 r55 → r125
feqlflags r60 r65 → r126
feqlflags r50 r50 → r127
IEEE status flags from floating-point compare
Operation
7
0
OFZ
6
IFZ
5
INV
4
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r80 ← 0
r90 ← 0
no change, since guard is false
r110 ← 0
r120 ← 0
r121 ← 0
r125 ← 0
r126 ← 0x20 (IFZ)
r127 ← 0
OVF
3
feql ieql fgtrflags
Philips Semiconductors
UNF
ATTRIBUTES
2
SEE ALSO
readpcsw
Result
INX
1
DBZ
0
fcomp
equal
149
No
—
2
1
3