PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 432

• Manufacturer Part Number: PNX1301EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1301EH

• Lead Free Status / RoHS Status: Not Compliant

Philips Semiconductors
Logical shift left immediate
pseudo-op for asli
SYNTAX
FUNCTION
DESCRIPTION
argument and opcode modifier. (Note: pseudo operations cannot be used in assembly source files.)
result in rdest equal to rsrc1 logically shifted left by n bits. The value of n must be between 0 and 31, inclusive. Zeros
are shifted into the LSBs of rdest while the MSBs shifted out of rsrc1 are lost.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is unchanged.
EXAMPLES
r60 = 0x20
r10 = 0, r60 = 0x20
r20 = 1, r60 = 0x20
r70 = 0xfffffffc
r80 = 0xe
The
As shown below, the
The
[ IF rguard ] lsli(n) rsrc1 → rdest
if rguard then {
}
lsli
lsli
rdest<31:n> ← rsrc1<31–n:0>
rdest<n–1:0> ← 0
Initial Values
operation is a pseudo operation that is transformed by the scheduler into an
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
Intermediate result
(example: n = 3)
lsli
operation takes a single argument in rsrc1 and an immediate modifier n and produces a
rsrc1
rdest
lsli(3) r60 → r90
IF r10 lsli(3) r60 → r100
IF r20 lsli(3) r60 → r110
lsli(2) r70 → r120
lsli(30) r80 → r125
31
31
32 bits from rsrc1
Operation
Left shifter
PRELIMINARY SPECIFICATION
PNX1300/01/02/11 DSPCPU Operations
3
r90 ← 0x100
no change, since guard is false
r110 ← 0x100
r120 ← 0xfffffff0
r125 ← 0x80000000
0
0
0
0
0
0
0
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
asl asli asr asri lsl lsr
Shift amount n
from operation modifier
lsri rol roli
ATTRIBUTES
SEE ALSO
Result
asli
with the same
shifter
7 bits
0..31
1, 2
11
1
1
A-134
lsli