PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 449
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PNX1301EH
Manufacturer Part Number
PNX1301EH
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1301EH.pdf
(548 pages)
Specifications of PNX1301EH
Lead Free Status / RoHS Status
Not Compliant
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PNX1300/01/02/11 Data Book
quadumin
SYNTAX
FUNCTION
DESCRIPTION
rsrc1 and rsrc2. All bytes are considered unsigned. The
median computation on packed pixel data structures:
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-151
r30 = 0x0201000e, r40 = 0xff00ff02
r10 = 0, r60 = 0x9c9c6464, r70 = 0x649d649c
r20 = 1, r60 = 0x9c9c6464, r70 = 0x649d649c
The
MEDIAN_Q(a,b,c) (QUADUMIN(QUADUMAX( QUADUMIN((a),(b)), (c)), QUADUMAX((a),(b))))
The
[ IF rguard ] quadumin rsrc1 rsrc2 → rdest
if rguard then {
}
rdest<7:0> ← if rsrc1<7:0> < rsrc2<7:0> then rsrc1<7:0> else rsrc2<7:0>
rdest<15:8> ← if rsrc1<15:8> < rsrc2<15:8> then rsrc1<15:8> else rsrc2<15:8>
rdest<23:16> ← if rsrc1<23:16> < rsrc2<23:16> then rsrc1<23:16> else rsrc2<23:16>
rdest<31:24> ← if rsrc1<31:24> < rsrc2<31:24> then rsrc1<31:24> else rsrc2<31:24>
quadumin
quadumin
Initial Values
operation computes four separate minimum values of the four pairs of corresponding 8-bit bytes of
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
PRELIMINARY SPECIFICATION
quadumin r30 r40 → r50
IF r10 quadumin r60 r70 → r80
IF r20 quadumin r60 r70 → r90
quadumin
Operation
Unsigned bytewise quad minimum
operation is particularly suited to implement
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
imin imax quadumax
r50 ← 0x02000002
no change, since guard is false
r90 ← 0x649c6464
Philips Semiconductors
ATTRIBUTES
SEE ALSO
Result
dspalu
1,3
No
80
—
2
2
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