PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 451

• Manufacturer Part Number: PNX1301EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1301EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
rdstatus
SYNTAX
FUNCTION
DESCRIPTION
into the destination register rdest. The target set in the data cache is determined by bits 10..6 of the result of rsrc1 + d.
The d value is an opcode modifier, must be in the range –256 to 252 inclusive, and must be a multiple of 4.
rdest are set to zero.
the LRU and dirty information stored in the cache port that corresponds to the operation slot in which the
operation is issued.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-153
r10 = 0
r20 = 1
The
The result of
rdstatus
The dual-ported data cache uses two separate copies of tag and status information. A
The
[ IF rguard ] rdstatus(d) rsrc1 → rdest
if rguard then {
}
set_addr ← rsrc1 + d
rdest<9:0> ← dcache_LRU_set(set_addr)
rdest<17:10> ← dcache_dirty_set(set_addr)
rdest<31:18> ← 0
rdstatus
rdstatus
/* set_addr<10:6> selects set */
Initial Values
requires two stall cycles to complete.
rdstatus
operation reads the LRU and dirty bits associated with a set in the data cache and writes these bits
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
PRELIMINARY SPECIFICATION
contains LRU information in bits 9..0 and dirty-bit information in bits 17..10. All other bits of
rdstatus(0) r30 → r60
IF r10 rdstatus(4) r40 → r70
IF r20 rdstatus(8) r50
Operation
→ r80
Read data cache status bits
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
no change, since guard is false
rdstatus
Philips Semiconductors
ATTRIBUTES
SEE ALSO
rdtag
Result
operation returns
–256..252 by 4
dmemspec
rdstatus
7 bits
203
1
3
5