TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 82

• Manufacturer Part Number: TXC-03305AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03305AIPQ

• Lead Free Status / RoHS Status: Not Compliant

TXC-03305-MB
Ed. 4, September 2000
M13X
TXC-03305
Address
20
Bit
7
6
5
4
3
2
1
0
1LOSSEL DS1 Loss of Signal Selection: A 0 selects the receive DS1 channels for
Symbol
1TRIST
1TAIS1
1TAIS0
1LBV3
1LBV2
1LBV1
1LBV0
Tri-State DS1 Receive Channels: A 1 causes all 28 receive DS1 data
(DRn) and clock (CRn) output leads to be set to a high impedance state.
loss of signal detection. A 1 selects the transmit DS1 channels for loss of
signal detection. The DS1 loss of signals (LOSn) are reported in register
locations 0CH through 0FH.
DS1 AIS Insertion Selection: These two bits control the insertion of AIS
(unframed all 1s) into the 28 DS1 channels on certain DS3 alarm condi-
tions that are defined in register location 00H. The following table lists the
settings for having various alarm conditions selected to cause AIS:
For the settings of 1TAIS1 and 1TAIS0 other than 0,0, the DS1 clock and
data outputs of the M13X go to one level for those cases where a received
DS3 alarm condition that is not supposed to produce a receive DS1 AIS
condition occurs.
The XCK clock is used as the timebase for generating the DS1 AIS clocks.
Remote Loopback Options: The following table indicates the various
ways the M13X can transmit and receive a DS1 remote loopback request in
the M13 or C-bit parity operating modes. The specified condition is trans-
mitted for the duration of the loopback request (see register 07H for trans-
mission operation):
Note: & = AND in the transmit direction, + = OR in the receive direction.
1LBV3
1TAIS1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
DATA SHEET
1LBV2
X
0
0
0
0
1
1
1
1
0
0
1
1TAIS0
- 82 -
0
1
0
1
1LBV1
0
0
1
1
0
0
1
1
0
0
1
X
Received DS3 Alarm Conditions
R3OOF, R3AIS, R3LOS, R3CKF
R3OOF, R3AIS, R3CKF
R3LOS
No AIS insertions
Description
1LBV0 Loopback Type
X
X
0
1
0
1
0
1
0
1
0
1
Third DS2 C-bit inverted
Second DS2 C-bit inverted
First DS2 C-bit inverted
Undefined - Do not use
Third DS2 C-bit &/+ (See Note)
DS2 stuff bit inverted
Second DS2 C-bit &/+ (See Note)
DS2 stuff bit inverted
First DS2 C-bit &/+ (See Note) DS2
stuff bit inverted
DS2 Stuff bit inverted
DS2 Stuff bit = 0
DS2 Stuff bit = 1
Undefined - Do not use
Undefined - Do not use