TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 33

• Manufacturer Part Number: TXC-03305AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03305AIPQ

• Lead Free Status / RoHS Status: Not Compliant

Notes:
1. The transmit clock (XCK) or receive clock (DS3CR) must be present for the microprocessor bus
2. The SEL lead must be brought high for 2 transmit clock cycles before the start of a new write cycle.
ALE pulse width
ALE wait after WR
A/D(7-0) address setup time before ALE
A/D(7-0) address hold time after ALE
A/D(7-0) data hold time after WR
SEL wait after ALE
WR pulse width
WR wait after ALE
interface to operate. The RDY/DTACK output lead is always driven high when the SEL lead is low,
otherwise it is tri-stated, which corresponds to the behavior of the M13E device.
ALE
A/D(7-0)
SEL
WR
Figure 13. Microprocessor Write Cycle Timing - Multiplexed Interface
Parameter
t
PW(1)
Address
t
SU
t
H(1)
t
OD
t
W(2)
DATA SHEET
Symbol
t
t
PW(1)
t
PW(2)
t
- 33 -
t
t
W(1)
t
W(2)
t
H(1)
H(2)
OD
SU
t
PW(2)
Min
200
95
20
30
25
20
25
Data
Typ
t
W(1)
t
212,000
H(2)
Max
80
Ed. 4, September 2000
TXC-03305
TXC-03305-MB
Unit
ns
ns
ns
ns
ns
ns
ns
ns
M13X