TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 15

no-image

TXC-03305AIPQ

Manufacturer Part Number
TXC-03305AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-03305AIPQ

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-03305AIPQ
Quantity:
7
Part Number:
TXC-03305AIPQ
Quantity:
23
DS3 INTERFACE
Notes:
1. DS3CT is not slew rate limited.
2. DS3DT is not slew rate limited.
Symbol
DS3CR
DS3DR
TXFRM
DS3CT
DS3DT
Lead No.
BGA
K16
P13
E16
T6
P6
Lead No.
PQFP
125
144
68
69
93
I/O/P
O
O
I
I
I
TTL8mA
TTL8mA
CMOS
CMOS
TTLp
Type
DATA SHEET
- 15 -
1
2
DS3 Receive Clock: A 44.736 MHz clock that is
used to clock DS3 data into the M13X. This clock is
used as the time base for demultiplexing the DS3
data. When the loop timing feature is active (a 1
written into bit 3 (LPTIME) in 02H), or when the
DS3 external transmit clock (XCK) fails, this clock
becomes the transmit clock.
DS3 Receive Data: Receive 44.736 Mbit/s data is
clocked into the M13X on rising edges of the
receive clock (DS3CR).
DS3 Transmit Clock: A 44.736 MHz clock which is
derived from the external transmit clock input signal
(XCK) or from the DS3 Receive Clock (DS3CR)
when loop timing mode is enabled or when the
XCK clock fails. It is used to clock DS3 data from
the M13X.
DS3 Transmit Data: Transmit C-bit parity or M13
formatted DS3 data is clocked out of the M13X on
rising edges of the transmit clock (DS3CT).
Transmit DS3 Frame Synchronization Pulse: An
active low pulse that is sampled on the rising edge
of the transmit DS3 clock (XCK or DS3CR), and is
used to align the transmit DS3 frame. The X1 bit of
the transmit DS3 frame is three clocks delayed with
respect to the TXFRM. The use of this lead is
optional. If it is not used then it must either be left
floating or pulled high.
Name/Function
Ed. 4, September 2000
TXC-03305
TXC-03305-MB
M13X

Related parts for TXC-03305AIPQ