TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 67

• Manufacturer Part Number: TXC-03305AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03305AIPQ

• Lead Free Status / RoHS Status: Not Compliant

MEMORY MAP
The M13X memory map consists of control bits, alarms (non-latched and latched), and counters that can be
accessed via the microprocessor interface. The unused bit positions in a register (shown shaded in the table
below) must be masked by software to avoid reading incorrect data. In R/W registers, the shaded positions
should be written with a 0. At power-up the memory map will remain random until a hardware reset is initiated
via the HRESET lead or a soft reset is applied via register 1FH. This register location is used to reset and ini-
tialize the M13X. After power becomes stable, a F0 Hex followed by a 00 Hex must be written into 1FH.
Address
(Hex)
0A
0B
0C
0D
0E
0F
1A
1B
1C
1D
1E
1F
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
(See Note 1)
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R(L)
R(L)
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
CERROR
M13XID0
C3CLKI
1TRIST
R3LOS
Test Bit
R3LOS
LBDS3
LBALL
CBIT1
EXEC
EXEC
EXEC
Bit 7
IDLB
FIDL
CPn: C-bit Parity Performance Counter (C-bit Parity Mode) / Number of RX DS3 Frames Counter (M13 Mode)
FBn: FEBE Performance Counter (C-bit Parity Mode) / DS3 F-bit and M-bit Error Counter (M13 Mode)
RHIS(2-0)
DS2OOF7
DS2OOF7
1LOSSEL
CON/DIS
CONT/10
CON/DIS
R3OOF
R3OOF
Test Bit
LOS25
LOS26
LOS27
LOS28
IDL25
IDL26
IDL27
IDL28
Bit 6
R2X7
T2X7
IDLA
LB25
LB26
LB27
LB28
NEW
DS2OOF6
DS2OOF6
TFEAC6
RFEAC6
Test Bit
LBSEL
LOS21
LOS22
LOS23
LOS24
1TAIS1
R3AIS
T3AIS
R3AIS
IDL21
IDL22
IDL23
IDL24
Bit 5
R2X6
LB21
LB22
LB23
LB24
T2X6
RESET and Test Register Mux (See Note 2)
DATA SHEET
FMEn: DS3 F-bit and M-bit Error Counter
PPn: P-bit parity Performance Counter
- 67 -
C1BZn: C1 Bit Equal to Zero Counter
MEn: DS3 M-Bits in Error Counter
DS2OOF5
DS2OOF5
TFEAC5
RFEAC5
R3AIS2
LOS17
LOS18
LOS19
LOS20
1TAIS0
R3IDL
R3IDL
LLB22
T3IDL
IDL17
IDL18
IDL19
IDL20
Bit 4
R2X5
3LBK
LB17
LB18
LB19
LB20
T2X5
D22
RXFS(1-0)
Test Bits
DS2OOF4
DS2OOF4
RFEAC4
TFEAC4
LPTIME
R3AIS1
R3CKF
R3CKF
LOS13
LOS14
LOS15
LOS16
Test Bits
LLB21
1LBV3
FEBE
IDL13
IDL14
IDL15
IDL16
Bit 3
R2X4
T2X4
LB13
LB14
LB15
LB16
D21
DS2OOF3
DS2OOF3
RFEAC3
TFEAC3
R3AIS0
T3CKF
LOS10
LOS11
LOS12
T3CKF
INVCK
1LBV2
PBITE
LLB20
IDL10
IDL11
IDL12
Bit 2
LOS9
R2X3
LB10
LB11
LB12
T2X3
IDL9
D20
LB9
TXFS(1-0)
DS2OOF2
DS2OOF2
TFEAC2
RFEAC2
T3AIS1
1LBV1
CBITE
LLB11
Bit 1
LOS5
LOS6
LOS7
LOS8
R2X2
T2X2
1INV
IDL6
IDL7
IDL8
IDL5
XR2
D11
XR2
LB5
LB6
LB7
LB8
Ed. 4, September 2000
TXC-03305
TXC-03305-MB
M13MODE
DS2OOF1
DS2OOF1
RFEAC1
TFEAC1
T3AIS0
LLB10
1LBV0
LOS1
LOS2
LOS3
LOS4
Bit 0
R2X1
T2X1
IDL1
IDL2
IDL3
IDL4
XR1
XR1
D10
LB1
LB2
LB3
LB4
XT
M13X